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openriscdevboard
WebSVN RSS feed - openriscdevboard
http://opencores.com/websvn,listing?repname=openriscdevboard&path=%2Fopenriscdevboard%2Ftrunk%2F&
Sun, 19 May 2013 10:16:04 +0100
FeedCreator 1.7.2
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New directory structure.
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Fopenriscdevboard%2Ftrunk%2F&rev=3
<div><strong>Rev 3 - root</strong> (8 file(s) modified)</div><div>New directory structure.</div>- /branches<br />+ /openriscdevboard<br />+ /openriscdevboard/branches<br />+ /openriscdevboard/tags<br />+ /openriscdevboard/trunk<br />+ /openriscdevboard/web_uploads<br />- /tags<br />- /trunk<br />
root
Tue, 10 Mar 2009 02:22:58 +0100
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Fopenriscdevboard%2Ftrunk%2F&rev=3
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First created in CVS.
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Ftrunk%2F&rev=2
<div><strong>Rev 2 - sfielding</strong> (425 file(s) modified)</div><div>First created in CVS.</div>+ /trunk/cyc2-openrisc<br />+ /trunk/cyc2-openrisc/bench<br />+ /trunk/cyc2-openrisc/bench/testHarness.v<br />+ /trunk/cyc2-openrisc/doc<br />+ /trunk/cyc2-openrisc/doc/cyc2-openrisc_application_note.pdf<br />+ /trunk/cyc2-openrisc/doc/HOWTO_add_new_SantaCruz_daughter_card.txt<br />+ /trunk/cyc2-openrisc/doc/mc_doc.pdf<br />+ /trunk/cyc2-openrisc/doc/src<br />+ /trunk/cyc2-openrisc/doc/src/cyc2-openrisc_application_note.odt<br />+ /trunk/cyc2-openrisc/model<br />+ /trunk/cyc2-openrisc/model/mt48lc2m32b2.v<br />+ /trunk/cyc2-openrisc/model/uart_rx.v<br />+ /trunk/cyc2-openrisc/progFiles<br />+ /trunk/cyc2-openrisc/progFiles/2008_08_22<br />+ /trunk/cyc2-openrisc/progFiles/2008_08_22/cyc_or12_mini_top.rbf<br />+ /trunk/cyc2-openrisc/progFiles/2008_08_22/download.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_08_22/usbMouse.bin<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/blockRAMresident_memTest<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/blockRAMresident_memTest/cyc_or12_mini_top_memTest.rbf<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/blockRAMresident_memTest/download.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/cyc_or12_mini_top.rbf<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/downloadFPGAimage.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/downloadSoftware_DRAMmemTest.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/downloadSoftware_SDTest.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/downloadSoftware_USBLoopBackTest.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/downloadSoftware_USBMouse.bat<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/memTestDramResident.bin<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/sdTest.bin<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/usbMouse.bin<br />+ /trunk/cyc2-openrisc/progFiles/2008_11_02/bootLoader/usbTest.bin<br />+ /trunk/cyc2-openrisc/rtl<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_crc8_d1.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_defines.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_register.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_registers.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_sync_clk1_clk2.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_top.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/dbg_trace.v<br />+ /trunk/cyc2-openrisc/rtl/dbg_interface/timescale.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_adr_sel.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_cs_rf.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_defines.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_dp.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_incn_r.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_mem_if.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_obct.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_obct_top.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_rd_fifo.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_refresh.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_rf.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_timing.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_top.v<br />+ /trunk/cyc2-openrisc/rtl/mem_ctrl/mc_wb_if.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if<br />+ /trunk/cyc2-openrisc/rtl/mem_if/flash_top.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if/generic_sram_top.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if/onchip_ram.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if/onchip_ram_loadDRAM.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if/onchip_ram_memTest.v<br />+ /trunk/cyc2-openrisc/rtl/mem_if/sram_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_alu.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_amultp2_32x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_cfgr.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_cpu.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_ctrl.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dc_fsm.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dc_ram.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dc_tag.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dc_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_defines.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dmmu_tlb.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dmmu_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dpram_32x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_dpram_256x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_du.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_except.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_freeze.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_genpc.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_gmultp2_32x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_ic_fsm.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_ic_ram.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_ic_tag.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_ic_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_if.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_immu_tlb.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_immu_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_iwb_biu.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_lsu.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_mem2reg.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_mult_mac.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_operandmuxes.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_pic.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_pm.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_qmem_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_reg2mem.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_rf.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_rfram_generic.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_sb.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_sb_fifo.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_32x24.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_64x14.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_64x22.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_64x24.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_128x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_256x21.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_512x20.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_1024x8.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_1024x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_1024x32_bw.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_2048x8.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_2048x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_spram_2048x32_bw.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_sprs.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_top.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_tpram_32x32.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_tt.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_wbmux.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_wb_biu.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/or1200_xcv_ram32x8d.v<br />+ /trunk/cyc2-openrisc/rtl/or1200/timescale.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/ctrlStsRegBI.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/initSD.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/readWriteSDBlock.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/readWriteSPIWireData.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sendCmd.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_dpMem_dc.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_fifoRTL.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_RxFifo.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_RxFifoBI.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_TxFifo.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/sm_TxFifoBI.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/spiCtrl.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/spiMaster.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/spiMasterWishBoneBI.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/spiMaster_defines.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/spiTxRxData.v<br />+ /trunk/cyc2-openrisc/rtl/spiMaster/timescale.v<br />+ /trunk/cyc2-openrisc/rtl/top<br />+ /trunk/cyc2-openrisc/rtl/top/cyc_or12_defines.v<br />+ /trunk/cyc2-openrisc/rtl/top/cyc_or12_mini_top.v<br />+ /trunk/cyc2-openrisc/rtl/top/cyc_or12_mini_top_sdCard.v<br />+ /trunk/cyc2-openrisc/rtl/top/ddrClkOut.v<br />+ /trunk/cyc2-openrisc/rtl/top/pll_30MHz_15MHz.v<br />+ /trunk/cyc2-openrisc/rtl/top/tc_top.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550<br />+ /trunk/cyc2-openrisc/rtl/uart16550/raminfr.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/timescale.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_debug_if.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_defines.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_receiver.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_regs.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_rfifo.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_sync_flops.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_tfifo.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_top.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_transmitter.v<br />+ /trunk/cyc2-openrisc/rtl/uart16550/uart_wb.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/dpMem_dc.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/fifoRTL.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/RxFifo.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/RxFifoBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/TxFifo.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/buffers/TxFifoBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/busInterface<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/busInterface/wishBoneBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/directcontrol.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/getpacket.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/hctxportarbiter.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/hostcontroller.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/rxStatusMonitor.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/sendpacket.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/sendpacketarbiter.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/sendpacketcheckpreamble.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/sofcontroller.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/softransmit.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/speedCtrlMux.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/usbHostControl.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostController/USBHostControlBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostSlaveMux<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostSlaveMux/hostSlaveMux.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/hostSlaveMux/hostSlaveMuxBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/timescale.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/usbConstants_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/usbHostControl_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/usbHostSlave_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/usbSerialInterfaceEngine_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/usbSlaveControl_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/include/wishBoneBus_h.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/lineControlUpdate.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/processRxBit.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/processRxByte.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/processTxByte.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/readUSBWireData.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/siereceiver.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/SIETransmitter.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/updateCRC5.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/updateCRC16.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/usbSerialInterfaceEngine.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/usbTxWireArbiter.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/serialInterfaceEngine/writeUSBWireData.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/endpMux.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/fifoMux.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/sctxportarbiter.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/slavecontroller.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/slaveDirectcontrol.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/slaveGetpacket.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/slaveRxStatusMonitor.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/slaveSendpacket.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/usbSlaveControl.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/slaveController/USBSlaveControlBI.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbHost.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbHostCyc2Wrap.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbHostCyc2Wrap_usb1t11.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbHostSlave.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbHostSlaveCyc2Wrap.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbSlave.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbSlaveCyc2Wrap.v<br />+ /trunk/cyc2-openrisc/rtl/usbhostslave/wrapper/usbSlaveCyc2Wrap_usb1t11.v<br />+ /trunk/cyc2-openrisc/sim<br />+ /trunk/cyc2-openrisc/sim/build_icarus.bat<br />+ /trunk/cyc2-openrisc/sim/filelist.icarus<br />+ /trunk/cyc2-openrisc/sim/gtkwave.ini<br />+ /trunk/cyc2-openrisc/sim/memory.hex<br />+ /trunk/cyc2-openrisc/sim/readme.txt<br />+ /trunk/cyc2-openrisc/sim/run_icarus.bat<br />+ /trunk/cyc2-openrisc/sim/viewWave.bat<br />+ /trunk/cyc2-openrisc/sw<br />+ /trunk/cyc2-openrisc/sw/hello-uart<br />+ /trunk/cyc2-openrisc/sw/hello-uart/board.h<br />+ /trunk/cyc2-openrisc/sw/hello-uart/download.bat<br />+ /trunk/cyc2-openrisc/sw/hello-uart/hello.c<br />+ /trunk/cyc2-openrisc/sw/hello-uart/Makefile<br />+ /trunk/cyc2-openrisc/sw/hello-uart/mc.h<br />+ /trunk/cyc2-openrisc/sw/hello-uart/ram.ld<br />+ /trunk/cyc2-openrisc/sw/hello-uart/README.txt<br />+ /trunk/cyc2-openrisc/sw/hello-uart/uart.h<br />+ /trunk/cyc2-openrisc/sw/loadRAM<br />+ /trunk/cyc2-openrisc/sw/loadRAM/bin2hex.pl<br />+ /trunk/cyc2-openrisc/sw/loadRAM/board.h<br />+ /trunk/cyc2-openrisc/sw/loadRAM/hex2bram.pl<br />+ /trunk/cyc2-openrisc/sw/loadRAM/jumpToRAM.s<br />+ /trunk/cyc2-openrisc/sw/loadRAM/loadRAM.c<br />+ /trunk/cyc2-openrisc/sw/loadRAM/loadRAM.intel.hex<br />+ /trunk/cyc2-openrisc/sw/loadRAM/Makefile<br />+ /trunk/cyc2-openrisc/sw/loadRAM/mc.h<br />+ /trunk/cyc2-openrisc/sw/loadRAM/ram.ld<br />+ /trunk/cyc2-openrisc/sw/loadRAM/README.txt<br />+ /trunk/cyc2-openrisc/sw/loadRAM/reset.S<br />+ /trunk/cyc2-openrisc/sw/loadRAM/spiMaster.h<br />+ /trunk/cyc2-openrisc/sw/loadRAM/uart.h<br />+ /trunk/cyc2-openrisc/sw/memTest<br />+ /trunk/cyc2-openrisc/sw/memTest/bin2hex.pl<br />+ /trunk/cyc2-openrisc/sw/memTest/board.h<br />+ /trunk/cyc2-openrisc/sw/memTest/download.bat<br />+ /trunk/cyc2-openrisc/sw/memTest/dram.ld<br />+ /trunk/cyc2-openrisc/sw/memTest/hex2bram.pl<br />+ /trunk/cyc2-openrisc/sw/memTest/Makefile<br />+ /trunk/cyc2-openrisc/sw/memTest/mc.h<br />+ /trunk/cyc2-openrisc/sw/memTest/memTest.c<br />+ /trunk/cyc2-openrisc/sw/memTest/memTest.intel.hex<br />+ /trunk/cyc2-openrisc/sw/memTest/memTestDramResident.bin<br />+ /trunk/cyc2-openrisc/sw/memTest/memTestSim.8bit.hex<br />+ /trunk/cyc2-openrisc/sw/memTest/ram.ld<br />+ /trunk/cyc2-openrisc/sw/memTest/README.txt<br />+ /trunk/cyc2-openrisc/sw/memTest/reset.S<br />+ /trunk/cyc2-openrisc/sw/memTest/uart.h<br />+ /trunk/cyc2-openrisc/sw/sdTest<br />+ /trunk/cyc2-openrisc/sw/sdTest/board.h<br />+ /trunk/cyc2-openrisc/sw/sdTest/Makefile<br />+ /trunk/cyc2-openrisc/sw/sdTest/mc.h<br />+ /trunk/cyc2-openrisc/sw/sdTest/ram.ld<br />+ /trunk/cyc2-openrisc/sw/sdTest/README.txt<br />+ /trunk/cyc2-openrisc/sw/sdTest/reset.S<br />+ /trunk/cyc2-openrisc/sw/sdTest/sdTest.c<br />+ /trunk/cyc2-openrisc/sw/sdTest/spiMaster.h<br />+ /trunk/cyc2-openrisc/sw/sdTest/uart.h<br />+ /trunk/cyc2-openrisc/sw/sdTest2<br />+ /trunk/cyc2-openrisc/sw/sdTest2/board.h<br />+ /trunk/cyc2-openrisc/sw/sdTest2/download.bat<br />+ /trunk/cyc2-openrisc/sw/sdTest2/Makefile<br />+ /trunk/cyc2-openrisc/sw/sdTest2/mc.h<br />+ /trunk/cyc2-openrisc/sw/sdTest2/ram.ld<br />+ /trunk/cyc2-openrisc/sw/sdTest2/reset.S<br />+ /trunk/cyc2-openrisc/sw/sdTest2/sdTest.bin<br />+ /trunk/cyc2-openrisc/sw/sdTest2/sdTest.c<br />+ /trunk/cyc2-openrisc/sw/sdTest2/spiMaster.h<br />+ /trunk/cyc2-openrisc/sw/sdTest2/uart.h<br />+ /trunk/cyc2-openrisc/sw/usbDevice<br />+ /trunk/cyc2-openrisc/sw/usbDevice/board.h<br />+ /trunk/cyc2-openrisc/sw/usbDevice/Makefile<br />+ /trunk/cyc2-openrisc/sw/usbDevice/mc.h<br />+ /trunk/cyc2-openrisc/sw/usbDevice/ram.ld<br />+ /trunk/cyc2-openrisc/sw/usbDevice/reset.S<br />+ /trunk/cyc2-openrisc/sw/usbDevice/uart.h<br />+ /trunk/cyc2-openrisc/sw/usbDevice/usb.h<br />+ /trunk/cyc2-openrisc/sw/usbDevice/usbDevice.bin<br />+ /trunk/cyc2-openrisc/sw/usbDevice/usbDevice.c<br />+ /trunk/cyc2-openrisc/sw/usbDevice/usbHostSlave.h<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/board.h<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/download.bat<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/Makefile<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/mc.h<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/ram.ld<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/reset.S<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/uart.h<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/usbHostSlave.h<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/usbTest.bin<br />+ /trunk/cyc2-openrisc/sw/usbLoopBackTest/usbTest.c<br />+ /trunk/cyc2-openrisc/sw/usbMouse<br />+ /trunk/cyc2-openrisc/sw/usbMouse/board.h<br />+ /trunk/cyc2-openrisc/sw/usbMouse/download.bat<br />+ /trunk/cyc2-openrisc/sw/usbMouse/Makefile<br />+ /trunk/cyc2-openrisc/sw/usbMouse/mc.h<br />+ /trunk/cyc2-openrisc/sw/usbMouse/ram.ld<br />+ /trunk/cyc2-openrisc/sw/usbMouse/reset.S<br />+ /trunk/cyc2-openrisc/sw/usbMouse/uart.h<br />+ /trunk/cyc2-openrisc/sw/usbMouse/usb.h<br />+ /trunk/cyc2-openrisc/sw/usbMouse/usbHostSlave.h<br />+ /trunk/cyc2-openrisc/sw/usbMouse/usbMouse.c<br />+ /trunk/cyc2-openrisc/syn<br />+ /trunk/cyc2-openrisc/syn/cyc_or12_mini_top.cof<br />+ /trunk/cyc2-openrisc/syn/cyc_or12_mini_top.qpf<br />+ /trunk/cyc2-openrisc/syn/cyc_or12_mini_top.qsf<br />+ /trunk/cyc2-openrisc/syn/cyc_or12_mini_top.sdc<br />+ /trunk/cyc2-openrisc/syn/download.bat<br />+ /trunk/Hardware<br />+ /trunk/Hardware/Main_Development_Platform<br />+ /trunk/Hardware/Main_Development_Platform/altera_dev_brd_sch.pdf<br />+ /trunk/Hardware/Main_Development_Platform/combined_BOM.ods<br />+ /trunk/Hardware/Main_Development_Platform/combined_BOM.pdf<br />+ /trunk/Hardware/Main_Development_Platform/Eagle<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.bom<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.bor<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.brd<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.cmp<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.drd<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.dri<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.gpi<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.gtp<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.plc<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.pls<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.sch<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.silk<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.sol<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.stc<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/altera_dev_brd.sts<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/Altera_FPGA_Board/eagle.epf<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.bom<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.bor<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.brd<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.cmp<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.drd<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.dri<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.gpi<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.gtp<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.plc<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.pls<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.sch<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.silk<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.sol<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.stc<br />+ /trunk/Hardware/Main_Development_Platform/Eagle/FPGA_Support_Board/fpgaConfig.sts<br />+ /trunk/Hardware/Main_Development_Platform/FPGA_Development_Platform_hw_description.odt<br />+ /trunk/Hardware/Main_Development_Platform/FPGA_Development_Platform_hw_description.pdf<br />+ /trunk/Hardware/Main_Development_Platform/FPGA_Support_Board_sch.pdf<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/Fairchild_Dual_USB_PHY<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/Fairchild_Dual_USB_PHY/dual_Fairchild_USB_PHY_daughter_card_12001-00Rev-01_sheet1.pdf<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/Fairchild_Dual_USB_PHY/dual_Fairchild_USB_PHY_daughter_card_12001-00Rev-01_sheet2.pdf<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/Fairchild_Dual_USB_PHY/Fairchild_dual_USB_PHY_Users_guide.odt<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/Fairchild_Dual_USB_PHY/Fairchild_dual_USB_PHY_Users_guide.pdf<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/dual_usb_sch.pdf<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.bom<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.bor<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.brd<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.cmp<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.drd<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.dri<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.erc<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.gpi<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.gtp<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.plc<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.pls<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.sch<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.silk<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.sol<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.stc<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/NXP_Dual_USB_PHY/Eagle/dual_usb.sts<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.bom<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.bor<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.brd<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.cmp<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.drd<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.dri<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.gpi<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.gtp<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.plc<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.pls<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.sch<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.silk<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.sol<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.stc<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval.sts<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/Eagle/sdEval_old_digikey.bom<br />+ /trunk/Hardware/Santa_Cruz_Daughter_Cards/SD_SPI_Flash_Eval/sdEval_sch.pdf<br />
sfielding
Tue, 18 Nov 2008 14:14:17 +0100
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Ftrunk%2F&rev=2
-
Standard project directories initialized by cvs2svn.
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Ftrunk%2F&rev=1
<div><strong>Rev 1 - </strong> (3 file(s) modified)</div><div>Standard project directories initialized by cvs2svn.</div>+ /branches<br />+ /tags<br />+ /trunk<br />
Tue, 18 Nov 2008 14:14:17 +0100
http://opencores.com/websvn,revision?repname=openriscdevboard&path=%2Ftrunk%2F&rev=1
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