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	                <button onclick="location.href='project,ha1588'">Back to project</button>
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        <link>http://opencores.com/websvn,listing?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;</link>
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        <item>
            <title>Added LGPL file header to all copyrighted files.</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=34</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 34 - edn_walter&lt;/strong&gt; (15 file(s) modified)&lt;/div&gt;&lt;div&gt;Added LGPL file header to all copyrighted files.&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/rtl/rtc/rtc.v&lt;br /&gt;~ /ha1588/trunk/rtl/top/ha1588.v&lt;br /&gt;~ /ha1588/trunk/rtl/top/ha1588_hw.tcl&lt;br /&gt;~ /ha1588/trunk/rtl/tsu/ptp_parser.v&lt;br /&gt;~ /ha1588/trunk/rtl/tsu/tsu.v&lt;br /&gt;~ /ha1588/trunk/sim/rtc/rtc_timer_tb.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ha1588_tb.v&lt;br /&gt;~ /ha1588/trunk/sim/top/nic_drv_bfm/gmii_rx_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/top/nic_drv_bfm/gmii_tx_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/tsu/gmii_rx_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/tsu/gmii_tx_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/tsu/tsu_queue_tb.v&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Tue, 10 Apr 2012 06:37:59 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=34</guid>
        </item>
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            <title>Redefined memory map. RTC and TSU now have separate address ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=33</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 33 - edn_walter&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Redefined memory map. RTC and TSU now have separate address ...&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/sim/top/nic_drv_bfm/ptpdv2_rx.pcap&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Tue, 10 Apr 2012 05:24:51 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=33</guid>
        </item>
        <item>
            <title>Added PTP standard time format output to the top module. ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=32</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 32 - edn_walter&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;Added PTP standard time format output to the top module. ...&lt;/div&gt;~ /ha1588/trunk/rtl/rtc/rtc.v&lt;br /&gt;~ /ha1588/trunk/rtl/top/ha1588.v&lt;br /&gt;~ /ha1588/trunk/rtl/top/ha1588_hw.tcl&lt;br /&gt;~ /ha1588/trunk/rtl/tsu/tsu.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ha1588_tb.v&lt;br /&gt;~ /ha1588/trunk/sim/tsu/tsu_queue_tb.v&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Tue, 10 Apr 2012 02:58:18 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=32</guid>
        </item>
        <item>
            <title>Added hand-shaking for the TSU data reading.</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=31</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 31 - edn_walter&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Added hand-shaking for the TSU data reading.&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Mon, 09 Apr 2012 09:33:06 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=31</guid>
        </item>
        <item>
            <title>Added multicycle timing constraint to ptp_parser.v, which works at data ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=29</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 29 - edn_walter&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;Added multicycle timing constraint to ptp_parser.v, which works at data ...&lt;/div&gt;~ /ha1588/trunk/par/altera/ha1588.qsf&lt;br /&gt;~ /ha1588/trunk/par/altera/ha1588.sdc&lt;br /&gt;~ /ha1588/trunk/rtl/tsu/ptp_parser.v&lt;br /&gt;~ /ha1588/trunk/rtl/tsu/tsu.v&lt;br /&gt;~ /ha1588/trunk/sim/top/wave.do&lt;br /&gt;~ /ha1588/trunk/sim/tsu/wave.do&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Mon, 09 Apr 2012 09:28:08 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=29</guid>
        </item>
        <item>
            <title>Updated test case.</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=26</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 26 - edn_walter&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Updated test case.&lt;/div&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Sat, 07 Apr 2012 08:09:25 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=26</guid>
        </item>
        <item>
            <title>Added test cases for top-level testbench to cover both RTC ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=24</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 24 - edn_walter&lt;/strong&gt; (11 file(s) modified)&lt;/div&gt;&lt;div&gt;Added test cases for top-level testbench to cover both RTC ...&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ha1588_tb.v&lt;br /&gt;+ /ha1588/trunk/sim/top/nic_drv_bfm/gmii_rx_bfm.v&lt;br /&gt;+ /ha1588/trunk/sim/top/nic_drv_bfm/gmii_tx_bfm.v&lt;br /&gt;+ /ha1588/trunk/sim/top/nic_drv_bfm/ptpdv2_rx.pcap&lt;br /&gt;+ /ha1588/trunk/sim/top/nic_drv_bfm/ptpdv2_tx.pcap&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v&lt;br /&gt;~ /ha1588/trunk/sim/top/sim.do&lt;br /&gt;~ /ha1588/trunk/sim/top/sim.sh&lt;br /&gt;~ /ha1588/trunk/sim/top/wave.do&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Fri, 06 Apr 2012 07:43:14 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=24</guid>
        </item>
        <item>
            <title>Added CDC hand-shaking for RTC time reading operation.</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=23</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 23 - edn_walter&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Added CDC hand-shaking for RTC time reading operation.&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;~ /ha1588/trunk/sim/top/wave.do&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Thu, 05 Apr 2012 13:47:47 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=23</guid>
        </item>
        <item>
            <title>RTC reset will clear ACC counter, but not clear ACC ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=22</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 22 - edn_walter&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;RTC reset will clear ACC counter, but not clear ACC ...&lt;/div&gt;~ /ha1588/trunk/rtl/rtc/rtc.v&lt;br /&gt;~ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;+ /ha1588/trunk/sim/top/sim.bat&lt;br /&gt;+ /ha1588/trunk/sim/top/sim.do&lt;br /&gt;~ /ha1588/trunk/sim/top/wave.do&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Thu, 05 Apr 2012 09:38:15 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=22</guid>
        </item>
        <item>
            <title>Added structure for top-level simulation. Systemverilog DPI will be used ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=21</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 21 - edn_walter&lt;/strong&gt; (11 file(s) modified)&lt;/div&gt;&lt;div&gt;Added structure for top-level simulation. Systemverilog DPI will be used ...&lt;/div&gt;~ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;~ /ha1588/trunk/rtl/top/ha1588.v&lt;br /&gt;+ /ha1588/trunk/sim/top/altera_mf.v&lt;br /&gt;+ /ha1588/trunk/sim/top/ha1588_tb.v&lt;br /&gt;+ /ha1588/trunk/sim/top/nic_drv_bfm&lt;br /&gt;+ /ha1588/trunk/sim/top/ptp_app_tlm&lt;br /&gt;+ /ha1588/trunk/sim/top/ptp_drv_bfm&lt;br /&gt;+ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c&lt;br /&gt;+ /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v&lt;br /&gt;+ /ha1588/trunk/sim/top/sim.sh&lt;br /&gt;+ /ha1588/trunk/sim/top/wave.do&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Wed, 04 Apr 2012 13:10:29 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=21</guid>
        </item>
        <item>
            <title>Renamed module name for tsu and rtc.
Added folder for reg ...</title>
            <link>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=15</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 15 - edn_walter&lt;/strong&gt; (16 file(s) modified)&lt;/div&gt;&lt;div&gt;Renamed module name for tsu and rtc.&lt;br /&gt;
Added folder for reg ...&lt;/div&gt;+ /ha1588/trunk/rtl/reg&lt;br /&gt;+ /ha1588/trunk/rtl/reg/reg.v&lt;br /&gt;+ /ha1588/trunk/rtl/rtc/rtc.v&lt;br /&gt;- /ha1588/trunk/rtl/rtc/rtc_timer.v&lt;br /&gt;+ /ha1588/trunk/rtl/sopc&lt;br /&gt;+ /ha1588/trunk/rtl/top&lt;br /&gt;+ /ha1588/trunk/rtl/top/top.v&lt;br /&gt;+ /ha1588/trunk/rtl/tsu/tsu.v&lt;br /&gt;- /ha1588/trunk/rtl/tsu/tsu_queue.v&lt;br /&gt;+ /ha1588/trunk/sim/reg&lt;br /&gt;~ /ha1588/trunk/sim/rtc/rtc_timer_tb.v&lt;br /&gt;~ /ha1588/trunk/sim/rtc/sim.do&lt;br /&gt;+ /ha1588/trunk/sim/sopc&lt;br /&gt;+ /ha1588/trunk/sim/top&lt;br /&gt;~ /ha1588/trunk/sim/tsu/sim.do&lt;br /&gt;~ /ha1588/trunk/sim/tsu/tsu_queue_tb.v&lt;br /&gt;</description>
            <author>edn_walter</author>
            <pubDate>Sat, 24 Mar 2012 13:33:45 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ha1588&amp;path=%2Fha1588%2Ftrunk%2Fsim%2Ftop%2F&amp;rev=15</guid>
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