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	                <button onclick="location.href='project,ethmac'">Back to project</button>
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        <title>ethmac</title>
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        <link>http://opencores.com/websvn,listing?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;</link>
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            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=338</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 338 - root&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;...&lt;/div&gt;- /ethernet&lt;br /&gt;+ /ethmac&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Tue, 05 May 2009 15:18:25 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=338</guid>
        </item>
        <item>
            <title>New directory structure.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=335</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 335 - root&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;New directory structure.&lt;/div&gt;- /branches&lt;br /&gt;+ /ethernet&lt;br /&gt;+ /ethernet/branches&lt;br /&gt;+ /ethernet/tags&lt;br /&gt;+ /ethernet/trunk&lt;br /&gt;+ /ethernet/web_uploads&lt;br /&gt;- /tags&lt;br /&gt;- /trunk&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Mon, 09 Mar 2009 10:03:10 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=335</guid>
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        <item>
            <title>This commit was manufactured by cvs2svn to create tag 'rel_15'.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=273</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 273 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'rel_15'.&lt;/div&gt;+ /tags/rel_15&lt;br /&gt;</description>
            <pubDate>Wed, 22 Jan 2003 13:49:27 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=273</guid>
        </item>
        <item>
            <title>When control packets were received, they were ignored in some ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=272</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 272 - tadejm&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;When control packets were received, they were ignored in some ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_maccontrol.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_receivecontrol.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_top.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;</description>
            <author>tadejm</author>
            <pubDate>Wed, 22 Jan 2003 13:49:26 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=272</guid>
        </item>
        <item>
            <title>When receiving normal data frame and RxFlow control was switched ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=270</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 270 - mohor&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;When receiving normal data frame and RxFlow control was switched ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_top.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Tue, 21 Jan 2003 12:09:40 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=270</guid>
        </item>
        <item>
            <title>When in full duplex, transmit was sometimes blocked. Fixed.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=269</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 269 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;When in full duplex, transmit was sometimes blocked. Fixed.&lt;/div&gt;~ /trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Mon, 20 Jan 2003 12:05:26 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=269</guid>
        </item>
        <item>
            <title>Release 1.19. Control frame description changed.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=268</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 268 - mohor&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Release 1.19. Control frame description changed.&lt;/div&gt;~ /trunk/doc/eth_speci.pdf&lt;br /&gt;~ /trunk/doc/src/eth_speci.doc&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Wed, 27 Nov 2002 18:46:16 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=268</guid>
        </item>
        <item>
            <title>Full duplex control frames tested.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=267</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 267 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Full duplex control frames tested.&lt;/div&gt;~ /trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Wed, 27 Nov 2002 16:21:55 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=267</guid>
        </item>
        <item>
            <title>Flow control test almost finished.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=266</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 266 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Flow control test almost finished.&lt;/div&gt;~ /trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Fri, 22 Nov 2002 17:29:42 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=266</guid>
        </item>
        <item>
            <title>Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=264</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 264 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Registers RxStatusWrite_rck and RxStatusWriteLatched were not used&lt;br /&gt;
anywhere. Removed.&lt;/div&gt;~ /trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Fri, 22 Nov 2002 13:26:21 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=264</guid>
        </item>
        <item>
            <title>test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=263</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 263 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;test_mac_full_duplex_flow_control tests pretty much finished.&lt;br /&gt;
TEST 0: INSERT CONTROL FRM. WHILE ...&lt;/div&gt;~ /trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Fri, 22 Nov 2002 02:12:16 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=263</guid>
        </item>
        <item>
            <title>Version 1.18 released.
MIIMRST (Reset of the MIIM module) not used ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=262</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 262 - mohor&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Version 1.18 released.&lt;br /&gt;
MIIMRST (Reset of the MIIM module) not used ...&lt;/div&gt;~ /trunk/doc/eth_speci.pdf&lt;br /&gt;~ /trunk/doc/src/eth_speci.doc&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Fri, 22 Nov 2002 02:00:52 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=262</guid>
        </item>
        <item>
            <title>Rx Flow control fixed. CF flag added to the RX ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=261</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 261 - mohor&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;Rx Flow control fixed. CF flag added to the RX ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_maccontrol.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_macstatus.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_receivecontrol.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_registers.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_rxaddrcheck.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_rxethmac.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_top.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Fri, 22 Nov 2002 01:57:06 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=261</guid>
        </item>
        <item>
            <title>test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=260</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 260 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame&lt;br /&gt;
finished.&lt;/div&gt;~ /trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Thu, 21 Nov 2002 13:56:50 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=260</guid>
        </item>
        <item>
            <title>In loopback rx_clk is not looped back. Possible CRC error. ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=259</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 259 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;In loopback rx_clk is not looped back. Possible CRC error. ...&lt;/div&gt;~ /trunk/rtl/verilog/TODO&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Thu, 21 Nov 2002 00:33:32 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=259</guid>
        </item>
        <item>
            <title>When TxUsedData and CtrlMux occur at the same time, byte ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=257</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 257 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;When TxUsedData and CtrlMux occur at the same time, byte ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_transmitcontrol.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Thu, 21 Nov 2002 00:16:14 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=257</guid>
        </item>
        <item>
            <title>TxDone and TxAbort changed so they're not propagated to the ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=256</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 256 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;TxDone and TxAbort changed so they're not propagated to the ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_maccontrol.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Thu, 21 Nov 2002 00:14:39 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=256</guid>
        </item>
        <item>
            <title>TPauseRq synchronized to tx_clk.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=255</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 255 - mohor&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;TPauseRq synchronized to tx_clk.&lt;/div&gt;~ /trunk/rtl/verilog/eth_top.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Thu, 21 Nov 2002 00:09:19 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=255</guid>
        </item>
        <item>
            <title>Temp version.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=254</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 254 - mohor&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Temp version.&lt;/div&gt;~ /trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;~ /trunk/bench/verilog/tb_eth_defines.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Tue, 19 Nov 2002 20:27:46 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=254</guid>
        </item>
        <item>
            <title>r_MiiMRst is not used for resetting the MIIM module. wb_rst ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=253</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 253 - mohor&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;r_MiiMRst is not used for resetting the MIIM module. wb_rst ...&lt;/div&gt;~ /trunk/rtl/verilog/eth_defines.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_registers.v&lt;br /&gt;~ /trunk/rtl/verilog/eth_top.v&lt;br /&gt;</description>
            <author>mohor</author>
            <pubDate>Tue, 19 Nov 2002 18:13:49 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2Ftags%2Frel_15%2F&amp;rev=253</guid>
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