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	                <button onclick="location.href='project,ethmac'">Back to project</button>
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        <title>ethmac</title>
        <description>WebSVN RSS feed - ethmac</description>
        <link>http://opencores.com/websvn,listing?repname=ethmac&amp;path=%2Fethmac%2F&amp;</link>
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            <title>Added option to dump VCD files</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=348</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 348 - olof&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Added option to dump VCD files&lt;/div&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;~ /ethmac/trunk/README.txt&lt;br /&gt;~ /ethmac/trunk/scripts/Makefile&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Mon, 18 Jul 2011 20:23:38 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=348</guid>
        </item>
        <item>
            <title>Added information about running with Icarus Verilog</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=347</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 347 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Added information about running with Icarus Verilog&lt;/div&gt;~ /ethmac/trunk/README.txt&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Mon, 18 Jul 2011 19:45:58 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=347</guid>
        </item>
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            <title>Updated project location</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=346</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 346 - olof&lt;/strong&gt; (36 file(s) modified)&lt;/div&gt;&lt;div&gt;Updated project location&lt;/div&gt;~ /ethmac/trunk/bench/verilog/eth_host.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/eth_memory.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/eth_phy.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/eth_phy_defines.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet_with_cop.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/tb_eth_defines.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/tb_eth_top.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/wb_master32.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/wb_master_behavioral.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/wb_model_defines.v&lt;br /&gt;~ /ethmac/trunk/bench/verilog/wb_slave_behavioral.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_clockgen.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_cop.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_crc.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_defines.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_fifo.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_maccontrol.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_macstatus.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_miim.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_outputcontrol.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_random.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_receivecontrol.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_register.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_registers.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_rxcounters.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_rxstatem.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_shiftreg.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_spram_256x32.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_top.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_transmitcontrol.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_txcounters.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_txethmac.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_txstatem.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_wishbone.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/timescale.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Mon, 18 Jul 2011 17:38:57 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=346</guid>
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        <item>
            <title>Temporarily disable failing tests</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=345</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 345 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Temporarily disable failing tests&lt;/div&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Mon, 18 Jul 2011 16:07:37 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=345</guid>
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        <item>
            <title>bit 9 in phy control register is self clearing</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=344</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 344 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;bit 9 in phy control register is self clearing&lt;/div&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Tue, 12 Jul 2011 14:02:12 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=344</guid>
        </item>
        <item>
            <title>Address miss should not be asserted on short frames</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=343</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 343 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Address miss should not be asserted on short frames&lt;/div&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Fri, 08 Jul 2011 18:06:04 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=343</guid>
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        <item>
            <title>Added cast to avoid inequality when comparing different data types</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=342</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 342 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Added cast to avoid inequality when comparing different data types&lt;/div&gt;~ /ethmac/trunk/bench/verilog/tb_ethernet.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Fri, 08 Jul 2011 17:58:55 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=342</guid>
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        <item>
            <title>Reset AdressMiss signal on new frames to prevent reporting the ...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=341</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 341 - olof&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Reset AdressMiss signal on new frames to prevent reporting the ...&lt;/div&gt;~ /ethmac/trunk/rtl/verilog/eth_rxaddrcheck.v&lt;br /&gt;~ /ethmac/trunk/rtl/verilog/eth_rxethmac.v&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Fri, 08 Jul 2011 17:44:50 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=341</guid>
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        <item>
            <title>Don't fail if log dir already exists</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=340</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 340 - olof&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Don't fail if log dir already exists&lt;/div&gt;~ /ethmac/trunk/scripts/Makefile&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Thu, 07 Jul 2011 20:20:25 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=340</guid>
        </item>
        <item>
            <title>Added basic support for Icarus Verilog</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=339</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 339 - olof&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Added basic support for Icarus Verilog&lt;/div&gt;+ /ethmac/trunk/scripts&lt;br /&gt;+ /ethmac/trunk/scripts/icarus.scr&lt;br /&gt;+ /ethmac/trunk/scripts/Makefile&lt;br /&gt;</description>
            <author>olof</author>
            <pubDate>Wed, 06 Jul 2011 20:58:21 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=339</guid>
        </item>
        <item>
            <title>...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=338</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 338 - root&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;...&lt;/div&gt;- /ethernet&lt;br /&gt;+ /ethmac&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Tue, 05 May 2009 15:18:25 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethmac%2F&amp;rev=338</guid>
        </item>
        <item>
            <title>...</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=337</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 337 - root&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;...&lt;/div&gt;- /ethernet/web_uploads/oc_checkin.sh&lt;br /&gt;- /ethernet/web_uploads/oc_cvs_checkin.sh&lt;br /&gt;- /ethernet/web_uploads/stats.tar.gz&lt;br /&gt;- /ethernet/web_uploads/svn_checkin.log&lt;br /&gt;- /ethernet/web_uploads/svn_checkin.sh&lt;br /&gt;- /ethernet/web_uploads/temp.sh&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Tue, 10 Mar 2009 13:22:09 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=337</guid>
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            <title>Added old uploaded documents to new repository.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=336</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 336 - root&lt;/strong&gt; (6 file(s) modified)&lt;/div&gt;&lt;div&gt;Added old uploaded documents to new repository.&lt;/div&gt;+ /ethernet/web_uploads/oc_checkin.sh&lt;br /&gt;+ /ethernet/web_uploads/oc_cvs_checkin.sh&lt;br /&gt;+ /ethernet/web_uploads/stats.tar.gz&lt;br /&gt;+ /ethernet/web_uploads/svn_checkin.log&lt;br /&gt;+ /ethernet/web_uploads/svn_checkin.sh&lt;br /&gt;+ /ethernet/web_uploads/temp.sh&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Mon, 09 Mar 2009 10:04:59 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=336</guid>
        </item>
        <item>
            <title>New directory structure.</title>
            <link>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=335</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 335 - root&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;New directory structure.&lt;/div&gt;- /branches&lt;br /&gt;+ /ethernet&lt;br /&gt;+ /ethernet/branches&lt;br /&gt;+ /ethernet/tags&lt;br /&gt;+ /ethernet/trunk&lt;br /&gt;+ /ethernet/web_uploads&lt;br /&gt;- /tags&lt;br /&gt;- /trunk&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Mon, 09 Mar 2009 10:03:10 +0100</pubDate>
            <guid>http://opencores.com/websvn,revision?repname=ethmac&amp;path=%2Fethernet%2F&amp;rev=335</guid>
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