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Rev Log message Author Age Path
23 revision 1.5 eyalhoc 1679d 19h /robust_axi_fabric/
22 eyalhoc 1691d 19h /robust_axi_fabric/
21 fixed pending also for slave fifos eyalhoc 1692d 18h /robust_axi_fabric/
20 IC give WVALID before AWREADY eyalhoc 1695d 12h /robust_axi_fabric/
19 IC support same ID from different masters eyalhoc 1698d 19h /robust_axi_fabric/
18 RobustVerilog version 1.4 compatible eyalhoc 1699d 11h /robust_axi_fabric/
17 Support RobustVerilog project eyalhoc 1711d 20h /robust_axi_fabric/
16 GUI support eyalhoc 1718d 15h /robust_axi_fabric/
15 eyalhoc 1727d 15h /robust_axi_fabric/
14 fixed run scripts eyalhoc 1744d 16h /robust_axi_fabric/
13 support single slave eyalhoc 1744d 21h /robust_axi_fabric/
12 allow no user signals eyalhoc 1750d 00h /robust_axi_fabric/
11 use match signals eyalhoc 1750d 00h /robust_axi_fabric/
10 added dos batch file for windows eyalhoc 1762d 16h /robust_axi_fabric/
9 fixed bug in address decoder eyalhoc 1768d 18h /robust_axi_fabric/
8 fixed bug in address decoding
if decode error without decode error slave mux to last slave
eyalhoc 1769d 16h /robust_axi_fabric/
7 added header eyalhoc 1770d 23h /robust_axi_fabric/
6 updated remarks eyalhoc 1773d 19h /robust_axi_fabric/
5 fixed run script eyalhoc 1774d 15h /robust_axi_fabric/
4 only 1 fabric generated eyalhoc 1781d 10h /robust_axi_fabric/

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