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Rev Log message Author Age Path
23 revision 1.5 eyalhoc 1612d 09h /robust_axi_fabric/
22 eyalhoc 1624d 08h /robust_axi_fabric/
21 fixed pending also for slave fifos eyalhoc 1625d 08h /robust_axi_fabric/
20 IC give WVALID before AWREADY eyalhoc 1628d 02h /robust_axi_fabric/
19 IC support same ID from different masters eyalhoc 1631d 08h /robust_axi_fabric/
18 RobustVerilog version 1.4 compatible eyalhoc 1632d 00h /robust_axi_fabric/
17 Support RobustVerilog project eyalhoc 1644d 10h /robust_axi_fabric/
16 GUI support eyalhoc 1651d 05h /robust_axi_fabric/
15 eyalhoc 1660d 05h /robust_axi_fabric/
14 fixed run scripts eyalhoc 1677d 06h /robust_axi_fabric/
13 support single slave eyalhoc 1677d 11h /robust_axi_fabric/
12 allow no user signals eyalhoc 1682d 13h /robust_axi_fabric/
11 use match signals eyalhoc 1682d 13h /robust_axi_fabric/
10 added dos batch file for windows eyalhoc 1695d 06h /robust_axi_fabric/
9 fixed bug in address decoder eyalhoc 1701d 07h /robust_axi_fabric/
8 fixed bug in address decoding
if decode error without decode error slave mux to last slave
eyalhoc 1702d 06h /robust_axi_fabric/
7 added header eyalhoc 1703d 12h /robust_axi_fabric/
6 updated remarks eyalhoc 1706d 08h /robust_axi_fabric/
5 fixed run script eyalhoc 1707d 05h /robust_axi_fabric/
4 only 1 fabric generated eyalhoc 1713d 23h /robust_axi_fabric/

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