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Rev Log message Author Age Path
201 Update ChangeLog olivier.girard 126d 09h /
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 126d 09h /
199 Update ChangeLog olivier.girard 232d 12h /
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 232d 12h /
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 483d 11h /
196 Update ChangeLog olivier.girard 526d 10h /
195 Update HTML documentation with configurable number of IRQ option. olivier.girard 526d 10h /
194 Update PDF and ODT documentation. olivier.girard 526d 11h /
193 Update FPGA projects with latest core RTL changes. olivier.girard 526d 11h /
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 526d 11h /
191 Update ChangeLog olivier.girard 666d 11h /
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 666d 11h /
189 Update ChangeLog olivier.girard 678d 11h /
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 678d 11h /
187 Update ChangeLog olivier.girard 779d 11h /
186 Fixed Hardware Multiplier byte operations bug:,assign,2247 olivier.girard 779d 11h /
185 Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version) olivier.girard 780d 12h /
184 Fixed some project settings for newer Quartus version (12.1) olivier.girard 780d 12h /
183 Update ChangeLog olivier.girard 821d 10h /
182 Minor update to reflect new ASIC_CLOCKING option. olivier.girard 821d 10h /

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