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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [] - Rev 134


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Rev Log message Author Age Path
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 1415d 21h /openmsp430/trunk/core/sim/rtl_sim/bin/
122 Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator.
olivier.girard 1584d 22h /openmsp430/trunk/core/sim/rtl_sim/bin/
99 Small fix for CVER simulator support. olivier.girard 1803d 22h /openmsp430/trunk/core/sim/rtl_sim/bin/
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 1803d 22h /openmsp430/trunk/core/sim/rtl_sim/bin/
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim
olivier.girard 1807d 21h /openmsp430/trunk/core/sim/rtl_sim/bin/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.
olivier.girard 2012d 23h /openmsp430/trunk/core/sim/rtl_sim/bin/
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 2172d 20h /openmsp430/trunk/core/sim/rtl_sim/bin/
37 olivier.girard 2229d 21h /openmsp430/trunk/core/sim/rtl_sim/bin/
33 In order to avoid confusion, the following changes have been implemented to the Verilog code:
- renamed the "rom_*" ports and defines to "pmem_*" (program memory).
- renamed the "ram_*" ports and defines to "dmem_*" (data memory).

In addition, in order to prevent potential conflicts with the Verilog defines of other IPs, a Verilog undefine file has been created.
olivier.girard 2230d 00h /openmsp430/trunk/core/sim/rtl_sim/bin/
17 Updated header with SVN info olivier.girard 2376d 21h /openmsp430/trunk/core/sim/rtl_sim/bin/
2 Upload complete openMSP430 project to the SVN repository olivier.girard 2411d 21h /openmsp430/trunk/core/sim/rtl_sim/bin/

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