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Rev Log message Author Age Path
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 1244d 19h /openmsp430/trunk/
100 Update HTML documentation with Actel's FPGA implementation example (file & directory description section). olivier.girard 1247d 18h /openmsp430/trunk/
99 Small fix for CVER simulator support. olivier.girard 1248d 19h /openmsp430/trunk/
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 1248d 19h /openmsp430/trunk/
97 Update Tools' Windows executables with EraseROM command fix. olivier.girard 1249d 18h /openmsp430/trunk/
96 Fixed EraseROM command in the TCL library of the Software development tools. olivier.girard 1249d 19h /openmsp430/trunk/
95 Update some test patterns for the additional simulator supports. olivier.girard 1252d 18h /openmsp430/trunk/
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim
olivier.girard 1252d 19h /openmsp430/trunk/
93 Update Tools' Windows executables. olivier.girard 1256d 18h /openmsp430/trunk/
92 Fixed bug where the openmsp430-minidebug application shows data memory size instead of program memory size and program memory size instead of data memory size.
Thanks to "dir" for reporting the bug :-)
olivier.girard 1256d 19h /openmsp430/trunk/

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