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Rev Log message Author Age Path
201 Update ChangeLog olivier.girard 125d 13h /openmsp430/
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 125d 13h /openmsp430/
199 Update ChangeLog olivier.girard 231d 16h /openmsp430/
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 231d 16h /openmsp430/
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 482d 15h /openmsp430/
196 Update ChangeLog olivier.girard 525d 14h /openmsp430/
195 Update HTML documentation with configurable number of IRQ option. olivier.girard 525d 14h /openmsp430/
194 Update PDF and ODT documentation. olivier.girard 525d 15h /openmsp430/
193 Update FPGA projects with latest core RTL changes. olivier.girard 525d 15h /openmsp430/
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 525d 15h /openmsp430/
191 Update ChangeLog olivier.girard 665d 15h /openmsp430/
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 665d 15h /openmsp430/
189 Update ChangeLog olivier.girard 677d 15h /openmsp430/
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 677d 15h /openmsp430/
187 Update ChangeLog olivier.girard 778d 15h /openmsp430/
186 Fixed Hardware Multiplier byte operations bug:,assign,2247 olivier.girard 778d 15h /openmsp430/
185 Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version) olivier.girard 779d 16h /openmsp430/
184 Fixed some project settings for newer Quartus version (12.1) olivier.girard 779d 16h /openmsp430/
183 Update ChangeLog olivier.girard 820d 14h /openmsp430/
182 Minor update to reflect new ASIC_CLOCKING option. olivier.girard 820d 14h /openmsp430/

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