OpenCores

Subversion Repositories openmsp430

[/] - Rev 134

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
114 Improved the VerifyCPU_ID procedure. olivier.girard 1404d 16h /
113 Created ChangeLog files... olivier.girard 1405d 16h /
112 Modified comment. olivier.girard 1409d 15h /
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
olivier.girard 1410d 15h /
110 Rework of the GUI for the software development tools.
Added possibility to give custom information through the omsp_alias.xml file.
olivier.girard 1411d 16h /
109 Update Xilinx FPGA example with the latest openMSP430 core RTL version. olivier.girard 1465d 00h /
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 1466d 13h /
107 Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version. olivier.girard 1466d 13h /
106 Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).
olivier.girard 1466d 14h /
105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.
olivier.girard 1481d 15h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2015 OpenCores.org, equivalent to ORSoC AB, all rights reserved. OpenCores®, registered trademark.