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[/] [ha1588/] [trunk/] [sim/] [top/] [ptp_drv_bfm/] [ptp_drv_bfm.v] - Rev 44

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38 1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c.
2. Added adj_done signal for CPU polling.
3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.
edn_walter 839d 00h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v
37 Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit edn_walter 839d 03h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v
34 Added LGPL file header to all copyrighted files. edn_walter 841d 00h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 844d 23h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 846d 17h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.v

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