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[/] [ha1588/] [trunk/] [sim/] [top/] [ptp_drv_bfm/] [ptp_drv_bfm.c] - Rev 33

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33 Redefined memory map. RTC and TSU now have separate address spans, can be easily divided into to independent modules. edn_walter 1209d 21h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
31 Added hand-shaking for the TSU data reading. edn_walter 1210d 17h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
26 Updated test case. edn_walter 1212d 18h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 1213d 18h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 1214d 12h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 1214d 16h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 1215d 13h /ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c

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