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[/] [ha1588/] [trunk/] [sim/] [top/] [ha1588_tb.v] - Rev 32

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32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 905d 13h /ha1588/trunk/sim/top/ha1588_tb.v
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 909d 08h /ha1588/trunk/sim/top/ha1588_tb.v
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 911d 03h /ha1588/trunk/sim/top/ha1588_tb.v

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