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[/] [ha1588/] - Rev 73

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Rev Log message Author Age Path
73 Corrected AXI4 wrapper timing bug.
Added system-level instantiation examples for XPS and Qsys.
ash_riple 111d 01h /ha1588/
72 Minor changes. ash_riple 436d 21h /ha1588/
71 Added architecture description in the doc folder. ash_riple 436d 23h /ha1588/
70 Updated Altera Qsys instantiation script. ash_riple 592d 20h /ha1588/
69 Fixed the negative period adjustment bug. ash_riple 594d 01h /ha1588/
68 Refined the vendor specific IP instanttiation. Now DCFIFO is instantiated as a vendor specific IP in PAR directory. ash_riple 594d 04h /ha1588/
67 Updated the WishBone IP top and Qsys IP top. ash_riple 595d 21h /ha1588/
66 Added IP instantiation support for: QSys, XPS and WishBone. ash_riple 596d 21h /ha1588/
65 Added WishBone compatible wrapper for register access. ash_riple 601d 01h /ha1588/
64 Added PTPv2 timing analyzer tool. ash_riple 602d 22h /ha1588/
63 Updated the simulation script under Linux. ash_riple 606d 02h /ha1588/
62 Removed environment variable settings in the simulation script under Windows. ash_riple 606d 02h /ha1588/
61 Made different scripts for top-level simulation to run under Linux. ash_riple 606d 03h /ha1588/
60 Made different scripts for top-level simulation to run under Linux. ash_riple 606d 03h /ha1588/
59 Made different scripts for top-level simulation to run under Windows. ash_riple 606d 03h /ha1588/
58 Added output rtc_time_one_pps for clock accuracy measurement. 1PPS output is leading edge aligned with the PTP time output on boundary of 1s. edn_walter 879d 00h /ha1588/
57 Added parameters of frame header constants for packet parsing. edn_walter 879d 01h /ha1588/
56 Added parameter of VLAN TPID for stacked VLAN parsing. edn_walter 879d 02h /ha1588/
55 Updated the SOPC Builder example with GMII/MII support. edn_walter 879d 22h /ha1588/
54 Added support for MII interface as well as GMII interface. Updated unit and top-level test cases. edn_walter 879d 23h /ha1588/

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