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[/] [ethmac/] [trunk/] [bench/] [verilog/] - Rev 243


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Rev Log message Author Age Path
156 Valid testbench. mohor 4778d 11h /ethmac/trunk/bench/verilog/
155 Minor changes. mohor 4778d 11h /ethmac/trunk/bench/verilog/
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 4821d 05h /ethmac/trunk/bench/verilog/
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 4823d 06h /ethmac/trunk/bench/verilog/
117 Clock mrx_clk set to 2.5 MHz. mohor 4827d 08h /ethmac/trunk/bench/verilog/
116 Testing environment also includes traffic cop, memory interface and host
mohor 4827d 08h /ethmac/trunk/bench/verilog/
108 Testbench supports unaligned accesses. mohor 4904d 12h /ethmac/trunk/bench/verilog/
107 TX_BUF_BASE changed. mohor 4904d 12h /ethmac/trunk/bench/verilog/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
mohor 4949d 09h /ethmac/trunk/bench/verilog/
80 Small fixes for external/internal DMA missmatches. mohor 4970d 05h /ethmac/trunk/bench/verilog/

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