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Rev Log message Author Age Path
338 root 2475d 12h /ethmac/tags/rel_9/
335 New directory structure. root 2532d 17h /ethmac/tags/rel_9/
237 This commit was manufactured by cvs2svn to create tag 'rel_9'. 4854d 14h /ethmac/tags/rel_9/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 4854d 14h /ethmac/tags/rel_9/
235 rev 4. mohor 4855d 05h /ethmac/tags/rel_9/
234 Figure list assed to the revision 3. mohor 4855d 13h /ethmac/tags/rel_9/
233 Revision 0.3 released. Some figures added. mohor 4855d 13h /ethmac/tags/rel_9/
232 fpga define added. mohor 4860d 08h /ethmac/tags/rel_9/
231 Description of Core Modules added (figure). mohor 4862d 10h /ethmac/tags/rel_9/
229 case changed to casex. mohor 4866d 06h /ethmac/tags/rel_9/
227 Changed BIST scan signals. tadejm 4866d 10h /ethmac/tags/rel_9/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 4866d 12h /ethmac/tags/rel_9/
225 Some minor changes. tadejm 4866d 12h /ethmac/tags/rel_9/
224 Signals for a wave window in Modelsim. tadejm 4866d 13h /ethmac/tags/rel_9/
223 Some code changed due to bug fixes. tadejm 4866d 13h /ethmac/tags/rel_9/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 4870d 11h /ethmac/tags/rel_9/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 4873d 12h /ethmac/tags/rel_9/
218 Typo error fixed. (When using Bist) mohor 4873d 14h /ethmac/tags/rel_9/
217 Bist supported. mohor 4873d 14h /ethmac/tags/rel_9/
216 Bist signals added. mohor 4873d 14h /ethmac/tags/rel_9/

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