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Rev Log message Author Age Path
365 Whitespace cleanup olof 1147d 15h /ethmac/
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 1148d 13h /ethmac/
363 quartus project files unneback 1148d 22h /ethmac/
362 added Makefiles to build project unneback 1148d 22h /ethmac/
361 created branch unneback unneback 1148d 22h /ethmac/
360 Added partial implementation of the debug register from ORPSoC olof 1149d 21h /ethmac/
359 Verilator linting fixes olof 1151d 23h /ethmac/
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 1153d 13h /ethmac/
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 1153d 13h /ethmac/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 1153d 15h /ethmac/
355 Import Julius Baxter's verilator hints from ORPSoC olof 1153d 16h /ethmac/
354 Whitespace cleanup olof 1153d 16h /ethmac/
353 Inherit fixes for bit width of constants from ORPSoC olof 1155d 18h /ethmac/
352 Removed delayed assignments from rtl code olof 1159d 23h /ethmac/
351 Turn defines into parameters in eth_cop olof 1168d 13h /ethmac/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 1168d 14h /ethmac/
349 Make all parameters configurable from top level olof 1169d 14h /ethmac/
348 Added option to dump VCD files olof 1170d 13h /ethmac/
347 Added information about running with Icarus Verilog olof 1170d 14h /ethmac/
346 Updated project location olof 1170d 16h /ethmac/

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