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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_swpb.s43] - Diff between revs 19 and 111

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Rev 19 Rev 111
Line 27... Line 27...
/*                                                                           */
/*                                                                           */
/* Author(s):                                                                */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $Rev: 111 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
/*===========================================================================*/
/*===========================================================================*/
 
 
 
.set    DMEM_BASE, (__data_start     )
 
.set    DMEM_200,  (__data_start+0x00)
 
.set    DMEM_202,  (__data_start+0x02)
 
.set    DMEM_204,  (__data_start+0x04)
 
.set    DMEM_206,  (__data_start+0x06)
 
.set    DMEM_208,  (__data_start+0x08)
 
.set    DMEM_209,  (__data_start+0x09)
 
.set    DMEM_20A,  (__data_start+0x0A)
 
.set    DMEM_20B,  (__data_start+0x0B)
 
.set    DMEM_20C,  (__data_start+0x0C)
 
.set    DMEM_20D,  (__data_start+0x0D)
 
.set    DMEM_20E,  (__data_start+0x0E)
 
.set    DMEM_20F,  (__data_start+0x0F)
 
.set    DMEM_210,  (__data_start+0x10)
 
.set    DMEM_212,  (__data_start+0x12)
 
.set    DMEM_214,  (__data_start+0x14)
 
.set    DMEM_216,  (__data_start+0x16)
 
.set    DMEM_218,  (__data_start+0x18)
 
.set    DMEM_219,  (__data_start+0x19)
 
.set    DMEM_21A,  (__data_start+0x1A)
 
.set    DMEM_21B,  (__data_start+0x1B)
 
.set    DMEM_21C,  (__data_start+0x1C)
 
.set    DMEM_21D,  (__data_start+0x1D)
 
.set    DMEM_21E,  (__data_start+0x1E)
 
.set    DMEM_21F,  (__data_start+0x1F)
 
.set    DMEM_220,  (__data_start+0x20)
 
.set    DMEM_222,  (__data_start+0x22)
 
.set    DMEM_224,  (__data_start+0x24)
 
 
.global main
.global main
 
 
main:
main:
        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
Line 59... Line 87...
 
 
        # Addressing mode: @Rn
        # Addressing mode: @Rn
        #------------------------
        #------------------------
 
 
        mov     #0x0102, r2        ;# Test 1
        mov     #0x0102, r2        ;# Test 1
        mov     #0x7524, &0x0200
        mov     #0x7524, &DMEM_200
        mov     #0x0200, r4
        mov   #DMEM_200, r4
        mov     #0xaaaa, &0x0202
        mov     #0xaaaa, &DMEM_202
        swpb        @r4            ;# SWPB (mem00=0x7524  => {mem00=0x2475)
        swpb        @r4            ;# SWPB (mem00=0x7524  => {mem00=0x2475)
        mov          r2, r5
        mov          r2, r5
 
 
        mov     #0x0005, r2        ;# Test 2
        mov     #0x0005, r2        ;# Test 2
        mov     #0x1cb6, &0x0202
        mov     #0x1cb6, &DMEM_202
        mov     #0x0202, r6
        mov   #DMEM_202, r6
        mov     #0xaaaa, &0x0204
        mov     #0xaaaa, &DMEM_204
        swpb        @r6            ;# SWPB (mem01=0x1cb6  => {mem01=0xb61c)
        swpb        @r6            ;# SWPB (mem01=0x1cb6  => {mem01=0xb61c)
        mov          r2, r7
        mov          r2, r7
 
 
        mov     #0x2000, r15
        mov     #0x2000, r15
 
 
 
 
        # Addressing mode: @Rn+
        # Addressing mode: @Rn+
        #------------------------
        #------------------------
 
 
        mov     #0x0102, r2        ;# Test 1
        mov     #0x0102, r2        ;# Test 1
        mov     #0x7524, &0x0208
        mov     #0x7524, &DMEM_208
        mov     #0x0208, r4
        mov   #DMEM_208, r4
        mov     #0xaaaa, &0x020A
        mov     #0xaaaa, &DMEM_20A
        swpb       @r4+            ;# SWPB (mem04=0x7524  => {mem04=0x2475)
        swpb       @r4+            ;# SWPB (mem04=0x7524  => {mem04=0x2475)
        mov          r2, r5
        mov          r2, r5
 
 
        mov     #0x0005, r2        ;# Test 2
        mov     #0x0005, r2        ;# Test 2
        mov     #0x1cb6, &0x020A
        mov     #0x1cb6, &DMEM_20A
        mov     #0x020A, r6
        mov   #DMEM_20A, r6
        mov     #0xaaaa, &0x020C
        mov     #0xaaaa, &DMEM_20C
        swpb       @r6+            ;# SWPB (mem05=0x1cb6  => {mem05=0xb61c)
        swpb       @r6+            ;# SWPB (mem05=0x1cb6  => {mem05=0xb61c)
        mov          r2, r7
        mov          r2, r7
 
 
        mov     #0x3000, r15
        mov     #0x3000, r15
 
 
 
 
        # Addressing mode: X(Rn)
        # Addressing mode: X(Rn)
        #------------------------
        #------------------------
 
 
        mov     #0x0102, r2        ;# Test 1
        mov     #0x0102, r2        ;# Test 1
        mov     #0x7524, &0x0210
        mov     #0x7524, &DMEM_210
        mov     #0x0200, r4
        mov   #DMEM_200, r4
        mov     #0xaaaa, &0x0212
        mov     #0xaaaa, &DMEM_212
        swpb      16(r4)            ;# SWPB (mem08=0x7524  => {mem08=0x2475)
        swpb      16(r4)            ;# SWPB (mem08=0x7524  => {mem08=0x2475)
        mov          r2, r5
        mov          r2, r5
 
 
        mov     #0x0005, r2        ;# Test 2
        mov     #0x0005, r2        ;# Test 2
        mov     #0x1cb6, &0x0212
        mov     #0x1cb6, &DMEM_212
        mov     #0x0200, r6
        mov   #DMEM_200, r6
        mov     #0xaaaa, &0x0214
        mov     #0xaaaa, &DMEM_214
        swpb      18(r6)            ;# SWPB (mem09=0x1cb6  => {mem09=0xb61c)
        swpb      18(r6)            ;# SWPB (mem09=0x1cb6  => {mem09=0xb61c)
        mov          r2, r7
        mov          r2, r7
 
 
        mov     #0x4000, r15
        mov     #0x4000, r15
 
 
 
 
        # Addressing mode: EDE
        # Addressing mode: EDE
        #------------------------
        #------------------------
.set   EDE_218,  (__data_start+0x0018)
.set   EDE_218,  DMEM_218
.set   EDE_21A,  (__data_start+0x001A)
.set   EDE_21A,  DMEM_21A
.set   EDE_21C,  (__data_start+0x001C)
.set   EDE_21C,  DMEM_21C
.set   EDE_21E,  (__data_start+0x001E)
.set   EDE_21E,  DMEM_21E
 
 
        mov     #0x0102, r2        ;# Test 1
        mov     #0x0102, r2        ;# Test 1
        mov     #0x7524, &0x0218
        mov     #0x7524, &DMEM_218
        mov     #0xaaaa, &0x021A
        mov     #0xaaaa, &DMEM_21A
        swpb    EDE_218            ;# SWPB (mem0c=0x7524  => {mem0c=0x2475)
        swpb    EDE_218            ;# SWPB (mem0c=0x7524  => {mem0c=0x2475)
        mov          r2, r5
        mov          r2, r5
 
 
        mov     #0x0005, r2        ;# Test 2
        mov     #0x0005, r2        ;# Test 2
        mov     #0x1cb6, &0x021A
        mov     #0x1cb6, &DMEM_21A
        mov     #0xaaaa, &0x021C
        mov     #0xaaaa, &DMEM_21C
        swpb    EDE_21A            ;# SWPB (mem0d=0x1cb6  => {mem0d=0xb61c)
        swpb    EDE_21A            ;# SWPB (mem0d=0x1cb6  => {mem0d=0xb61c)
        mov          r2, r7
        mov          r2, r7
 
 
        mov     #0x5000, r15
        mov     #0x5000, r15
 
 
 
 
        # Addressing mode: &EDE
        # Addressing mode: &EDE
        #------------------------
        #------------------------
.set   aEDE_220,  0x0220
.set   aEDE_220,  DMEM_220
.set   aEDE_222,  0x0222
.set   aEDE_222,  DMEM_222
.set   aEDE_224,  0x0224
.set   aEDE_224,  DMEM_224
.set   aEDE_226,  0x0226
.set   aEDE_226,  DMEM_226
 
 
        mov     #0x0102, r2        ;# Test 1
        mov     #0x0102, r2        ;# Test 1
        mov     #0x7524, &0x0220
        mov     #0x7524, &DMEM_220
        mov     #0xaaaa, &0x0222
        mov     #0xaaaa, &DMEM_222
        swpb  &aEDE_220            ;# SWPB (mem10=0x7524  => {mem10=0x2475)
        swpb  &aEDE_220            ;# SWPB (mem10=0x7524  => {mem10=0x2475)
        mov          r2, r5
        mov          r2, r5
 
 
        mov     #0x0005, r2        ;# Test 2
        mov     #0x0005, r2        ;# Test 2
        mov     #0x1cb6, &0x0222
        mov     #0x1cb6, &DMEM_222
        mov     #0xaaaa, &0x0224
        mov     #0xaaaa, &DMEM_224
        swpb  &aEDE_222            ;# SWPB (mem11=0x1cb6  => {mem11=0xb61c)
        swpb  &aEDE_222            ;# SWPB (mem11=0x1cb6  => {mem11=0xb61c)
        mov          r2, r7
        mov          r2, r7
 
 
        mov     #0x6000, r15
        mov     #0x6000, r15
 
 

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