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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_fifo.v] - Diff between revs 354 and 356

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Rev 354 Rev 356
Line 54... Line 54...
// MHz. Statuses, overrun, control frame transmission and reception still  need
// MHz. Statuses, overrun, control frame transmission and reception still  need
// to be fixed.
// to be fixed.
//
//
//
//
 
 
`include "eth_defines.v"
`include "ethmac_defines.v"
`include "timescale.v"
`include "timescale.v"
 
 
module eth_fifo (data_in, data_out, clk, reset, write, read, clear,
module eth_fifo (data_in, data_out, clk, reset, write, read, clear,
                 almost_full, full, almost_empty, empty, cnt);
                 almost_full, full, almost_empty, empty, cnt);
 
 

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