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RUNNING the simulation/Testbench in Icarus Verilog:
RUNNING the simulation/Testbench in Icarus Verilog:
 
 
Go to the scripts directory and write "make rtl-tests"
Go to the scripts directory and write "make rtl-tests"
All logs will be saved in the log directory
All logs will be saved in the log directory
 
 
VCD dumps are coming soon
To activate VCD dumps, run with "make rtl-tests VCD=1". The VCD is saved
 
in build/sim/ethmac.vcd
 
 
 
 
RUNNING the simulation/Testbench in ModelSIM:
RUNNING the simulation/Testbench in ModelSIM:
 
 
Open ModelSIM project: ethernet/sim/rtl_sim/modelsim_sim/bin/ethernet.mpf
Open ModelSIM project: ethernet/sim/rtl_sim/modelsim_sim/bin/ethernet.mpf
Run the macro do.do (write "do do.do" in the command window).
Run the macro do.do (write "do do.do" in the command window).

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