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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [openmsp430/] [openMSP430_undefines.v] - Blame information for rev 111

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Line No. Rev Author Line
1 33 olivier.girard
//----------------------------------------------------------------------------
2
// Copyright (C) 2001 Authors
3
//
4
// This source file may be used and distributed without restriction provided
5
// that this copyright statement is not removed from the file and that any
6
// derivative work contains the original copyright notice and the associated
7
// disclaimer.
8
//
9
// This source file is free software; you can redistribute it and/or modify
10
// it under the terms of the GNU Lesser General Public License as published
11
// by the Free Software Foundation; either version 2.1 of the License, or
12
// (at your option) any later version.
13
//
14
// This source is distributed in the hope that it will be useful, but WITHOUT
15
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
17
// License for more details.
18
//
19
// You should have received a copy of the GNU Lesser General Public License
20
// along with this source; if not, write to the Free Software Foundation,
21
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
22
//
23
//----------------------------------------------------------------------------
24
// 
25
// *File Name: openMSP430_undefines.v
26
// 
27
// *Module Description:
28
//                      openMSP430 Verilog `undef file
29
//
30
// *Author(s):
31
//              - Olivier Girard,    olgirard@gmail.com
32
//
33
//----------------------------------------------------------------------------
34
// $Rev: 23 $
35
// $LastChangedBy: olivier.girard $
36
// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
37
//----------------------------------------------------------------------------
38
 
39
//----------------------------------------------------------------------------
40 111 olivier.girard
// BASIC SYSTEM CONFIGURATION
41 33 olivier.girard
//----------------------------------------------------------------------------
42
 
43 111 olivier.girard
// Program Memory sizes
44 72 olivier.girard
`ifdef PMEM_SIZE_59_KB
45
`undef PMEM_SIZE_59_KB
46
`endif
47
`ifdef PMEM_SIZE_55_KB
48
`undef PMEM_SIZE_55_KB
49
`endif
50
`ifdef PMEM_SIZE_54_KB
51
`undef PMEM_SIZE_54_KB
52
`endif
53
`ifdef PMEM_SIZE_51_KB
54
`undef PMEM_SIZE_51_KB
55
`endif
56
`ifdef PMEM_SIZE_48_KB
57
`undef PMEM_SIZE_48_KB
58
`endif
59
`ifdef PMEM_SIZE_41_KB
60
`undef PMEM_SIZE_41_KB
61
`endif
62
`ifdef PMEM_SIZE_32_KB
63
`undef PMEM_SIZE_32_KB
64
`endif
65
`ifdef PMEM_SIZE_24_KB
66
`undef PMEM_SIZE_24_KB
67
`endif
68
`ifdef PMEM_SIZE_16_KB
69
`undef PMEM_SIZE_16_KB
70
`endif
71
`ifdef PMEM_SIZE_12_KB
72
`undef PMEM_SIZE_12_KB
73
`endif
74
`ifdef PMEM_SIZE_8_KB
75
`undef PMEM_SIZE_8_KB
76
`endif
77
`ifdef PMEM_SIZE_4_KB
78
`undef PMEM_SIZE_4_KB
79
`endif
80
`ifdef PMEM_SIZE_2_KB
81
`undef PMEM_SIZE_2_KB
82
`endif
83
`ifdef PMEM_SIZE_1_KB
84
`undef PMEM_SIZE_1_KB
85
`endif
86 111 olivier.girard
 
87
// Data Memory sizes
88 72 olivier.girard
`ifdef DMEM_SIZE_32_KB
89
`undef DMEM_SIZE_32_KB
90
`endif
91
`ifdef DMEM_SIZE_24_KB
92
`undef DMEM_SIZE_24_KB
93
`endif
94
`ifdef DMEM_SIZE_16_KB
95
`undef DMEM_SIZE_16_KB
96
`endif
97
`ifdef DMEM_SIZE_10_KB
98
`undef DMEM_SIZE_10_KB
99
`endif
100
`ifdef DMEM_SIZE_8_KB
101
`undef DMEM_SIZE_8_KB
102
`endif
103
`ifdef DMEM_SIZE_5_KB
104
`undef DMEM_SIZE_5_KB
105
`endif
106
`ifdef DMEM_SIZE_4_KB
107
`undef DMEM_SIZE_4_KB
108
`endif
109
`ifdef DMEM_SIZE_2p5_KB
110
`undef DMEM_SIZE_2p5_KB
111
`endif
112
`ifdef DMEM_SIZE_2_KB
113
`undef DMEM_SIZE_2_KB
114
`endif
115
`ifdef DMEM_SIZE_1_KB
116
`undef DMEM_SIZE_1_KB
117
`endif
118
`ifdef DMEM_SIZE_512_B
119
`undef DMEM_SIZE_512_B
120
`endif
121
`ifdef DMEM_SIZE_256_B
122
`undef DMEM_SIZE_256_B
123
`endif
124
`ifdef DMEM_SIZE_128_B
125
`undef DMEM_SIZE_128_B
126
`endif
127 111 olivier.girard
 
128
// Include/Exclude Hardware Multiplier
129
`ifdef MULTIPLIER
130
`undef MULTIPLIER
131 33 olivier.girard
`endif
132 111 olivier.girard
 
133
// Include Debug interface
134
`ifdef DBG_EN
135
`undef DBG_EN
136
`endif
137
 
138
 
139
//----------------------------------------------------------------------------
140
// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
141
//----------------------------------------------------------------------------
142
 
143
// Peripheral Memory Space:
144
`ifdef PER_SIZE_32_KB
145
`undef PER_SIZE_32_KB
146
`endif
147
`ifdef PER_SIZE_16_KB
148
`undef PER_SIZE_16_KB
149
`endif
150
`ifdef PER_SIZE_8_KB
151
`undef PER_SIZE_8_KB
152
`endif
153
`ifdef PER_SIZE_4_KB
154
`undef PER_SIZE_4_KB
155
`endif
156
`ifdef PER_SIZE_2_KB
157
`undef PER_SIZE_2_KB
158
`endif
159
`ifdef PER_SIZE_1_KB
160
`undef PER_SIZE_1_KB
161
`endif
162
`ifdef PER_SIZE_512_B
163
`undef PER_SIZE_512_B
164
`endif
165
 
166
// Let the CPU break after a PUC occurrence by default
167
`ifdef DBG_RST_BRK_EN
168
`undef DBG_RST_BRK_EN
169
`endif
170
 
171
// Custom user version number
172
`ifdef USER_VERSION
173
`undef USER_VERSION
174
`endif
175
 
176
 
177
//----------------------------------------------------------------------------
178
// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
179
//----------------------------------------------------------------------------
180
 
181
// Number of hardware breakpoint units
182
`ifdef DBG_HWBRK_0
183
`undef DBG_HWBRK_0
184
`endif
185
`ifdef DBG_HWBRK_1
186
`undef DBG_HWBRK_1
187
`endif
188
`ifdef DBG_HWBRK_2
189
`undef DBG_HWBRK_2
190
`endif
191
`ifdef DBG_HWBRK_3
192
`undef DBG_HWBRK_3
193
`endif
194
 
195
// Enable/Disable the hardware breakpoint RANGE mode
196
`ifdef DBG_HWBRK_RANGE
197
`undef DBG_HWBRK_RANGE
198
`endif
199
 
200
// Input synchronizers
201
`ifdef SYNC_CPU_EN
202
`undef SYNC_CPU_EN
203
`endif
204
`ifdef SYNC_DBG_EN
205
`undef SYNC_DBG_EN
206
`endif
207
`ifdef SYNC_DBG_UART_RXD
208
`undef SYNC_DBG_UART_RXD
209
`endif
210
`ifdef SYNC_NMI
211
`undef SYNC_NMI
212
`endif
213
 
214
 
215
//==========================================================================//
216
//==========================================================================//
217
//==========================================================================//
218
//==========================================================================//
219
//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
220
//==========================================================================//
221
//==========================================================================//
222
//==========================================================================//
223
//==========================================================================//
224
 
225
// Program Memory Size
226 72 olivier.girard
`ifdef PMEM_AWIDTH
227
`undef PMEM_AWIDTH
228
`endif
229 111 olivier.girard
`ifdef PMEM_SIZE
230
`undef PMEM_SIZE
231 33 olivier.girard
`endif
232 111 olivier.girard
 
233
// Data Memory Size
234 72 olivier.girard
`ifdef DMEM_AWIDTH
235
`undef DMEM_AWIDTH
236
`endif
237 111 olivier.girard
`ifdef DMEM_SIZE
238
`undef DMEM_SIZE
239
`endif
240 33 olivier.girard
 
241 111 olivier.girard
// Peripheral Memory Size
242
`ifdef PER_AWIDTH
243
`undef PER_AWIDTH
244
`endif
245
`ifdef PER_SIZE
246
`undef PER_SIZE
247
`endif
248
 
249 33 olivier.girard
// Data Memory Base Adresses
250
`ifdef DMEM_BASE
251
`undef DMEM_BASE
252
`endif
253
 
254
// Program & Data Memory most significant address bit (for 16 bit words)
255
`ifdef PMEM_MSB
256
`undef PMEM_MSB
257
`endif
258
`ifdef DMEM_MSB
259
`undef DMEM_MSB
260
`endif
261 111 olivier.girard
`ifdef PER_MSB
262
`undef PER_MSB
263
`endif
264 33 olivier.girard
 
265
// Instructions type
266
`ifdef INST_SO
267
`undef INST_SO
268
`endif
269
`ifdef INST_JMP
270
`undef INST_JMP
271
`endif
272
`ifdef INST_TO
273
`undef INST_TO
274
`endif
275
 
276
// Single-operand arithmetic
277
`ifdef RRC
278
`undef RRC
279
`endif
280
`ifdef SWPB
281
`undef SWPB
282
`endif
283
`ifdef RRA
284
`undef RRA
285
`endif
286
`ifdef SXT
287
`undef SXT
288
`endif
289
`ifdef PUSH
290
`undef PUSH
291
`endif
292
`ifdef CALL
293
`undef CALL
294
`endif
295
`ifdef RETI
296
`undef RETI
297
`endif
298
`ifdef IRQ
299
`undef IRQ
300
`endif
301
 
302
// Conditional jump
303
`ifdef JNE
304
`undef JNE
305
`endif
306
`ifdef JEQ
307
`undef JEQ
308
`endif
309
`ifdef JNC
310
`undef JNC
311
`endif
312
`ifdef JC
313
`undef JC
314
`endif
315
`ifdef JN
316
`undef JN
317
`endif
318
`ifdef JGE
319
`undef JGE
320
`endif
321
`ifdef JL
322
`undef JL
323
`endif
324
`ifdef JMP
325
`undef JMP
326
`endif
327
 
328
// Two-operand arithmetic
329
`ifdef MOV
330
`undef MOV
331
`endif
332
`ifdef ADD
333
`undef ADD
334
`endif
335
`ifdef ADDC
336
`undef ADDC
337
`endif
338
`ifdef SUBC
339
`undef SUBC
340
`endif
341
`ifdef SUB
342
`undef SUB
343
`endif
344
`ifdef CMP
345
`undef CMP
346
`endif
347
`ifdef DADD
348
`undef DADD
349
`endif
350
`ifdef BIT
351
`undef BIT
352
`endif
353
`ifdef BIC
354
`undef BIC
355
`endif
356
`ifdef BIS
357
`undef BIS
358
`endif
359
`ifdef XOR
360
`undef XOR
361
`endif
362
`ifdef AND
363
`undef AND
364
`endif
365
 
366
// Addressing modes
367
`ifdef DIR
368
`undef DIR
369
`endif
370
`ifdef IDX
371
`undef IDX
372
`endif
373
`ifdef INDIR
374
`undef INDIR
375
`endif
376
`ifdef INDIR_I
377
`undef INDIR_I
378
`endif
379
`ifdef SYMB
380
`undef SYMB
381
`endif
382
`ifdef IMM
383
`undef IMM
384
`endif
385
`ifdef ABS
386
`undef ABS
387
`endif
388
`ifdef CONST
389
`undef CONST
390
`endif
391
 
392 111 olivier.girard
// Instruction state machine
393
`ifdef I_IRQ_FETCH
394
`undef I_IRQ_FETCH
395
`endif
396
`ifdef I_IRQ_DONE
397
`undef I_IRQ_DONE
398
`endif
399
`ifdef I_DEC
400
`undef I_DEC
401
`endif
402
`ifdef I_EXT1
403
`undef I_EXT1
404
`endif
405
`ifdef I_EXT2
406
`undef I_EXT2
407
`endif
408
`ifdef I_IDLE
409
`undef I_IDLE
410
`endif
411
 
412 33 olivier.girard
// Execution state machine
413
`ifdef E_IRQ_0
414
`undef E_IRQ_0
415
`endif
416
`ifdef E_IRQ_1
417
`undef E_IRQ_1
418
`endif
419
`ifdef E_IRQ_2
420
`undef E_IRQ_2
421
`endif
422
`ifdef E_IRQ_3
423
`undef E_IRQ_3
424
`endif
425
`ifdef E_IRQ_4
426
`undef E_IRQ_4
427
`endif
428
`ifdef E_SRC_AD
429
`undef E_SRC_AD
430
`endif
431
`ifdef E_SRC_RD
432
`undef E_SRC_RD
433
`endif
434
`ifdef E_SRC_WR
435
`undef E_SRC_WR
436
`endif
437
`ifdef E_DST_AD
438
`undef E_DST_AD
439
`endif
440
`ifdef E_DST_RD
441
`undef E_DST_RD
442
`endif
443
`ifdef E_DST_WR
444
`undef E_DST_WR
445
`endif
446
`ifdef E_EXEC
447
`undef E_EXEC
448
`endif
449
`ifdef E_JUMP
450
`undef E_JUMP
451
`endif
452
`ifdef E_IDLE
453
`undef E_IDLE
454
`endif
455
 
456
// ALU control signals
457
`ifdef ALU_SRC_INV
458
`undef ALU_SRC_INV
459
`endif
460
`ifdef ALU_INC
461
`undef ALU_INC
462
`endif
463
`ifdef ALU_INC_C
464
`undef ALU_INC_C
465
`endif
466
`ifdef ALU_ADD
467
`undef ALU_ADD
468
`endif
469
`ifdef ALU_AND
470
`undef ALU_AND
471
`endif
472
`ifdef ALU_OR
473
`undef ALU_OR
474
`endif
475
`ifdef ALU_XOR
476
`undef ALU_XOR
477
`endif
478
`ifdef ALU_DADD
479
`undef ALU_DADD
480
`endif
481
`ifdef ALU_STAT_7
482
`undef ALU_STAT_7
483
`endif
484
`ifdef ALU_STAT_F
485
`undef ALU_STAT_F
486
`endif
487
`ifdef ALU_SHIFT
488
`undef ALU_SHIFT
489
`endif
490
`ifdef EXEC_NO_WR
491
`undef EXEC_NO_WR
492
`endif
493
 
494
// Debug interface
495
`ifdef DBG_UART_WR
496
`undef DBG_UART_WR
497
`endif
498
`ifdef DBG_UART_BW
499
`undef DBG_UART_BW
500
`endif
501
`ifdef DBG_UART_ADDR
502
`undef DBG_UART_ADDR
503
`endif
504
 
505
// Debug interface CPU_CTL register
506
`ifdef HALT
507
`undef HALT
508
`endif
509
`ifdef RUN
510
`undef RUN
511
`endif
512
`ifdef ISTEP
513
`undef ISTEP
514
`endif
515
`ifdef SW_BRK_EN
516
`undef SW_BRK_EN
517
`endif
518
`ifdef FRZ_BRK_EN
519
`undef FRZ_BRK_EN
520
`endif
521
`ifdef RST_BRK_EN
522
`undef RST_BRK_EN
523
`endif
524
`ifdef CPU_RST
525
`undef CPU_RST
526
`endif
527
 
528
// Debug interface CPU_STAT register
529
`ifdef HALT_RUN
530
`undef HALT_RUN
531
`endif
532
`ifdef PUC_PND
533
`undef PUC_PND
534
`endif
535
`ifdef SWBRK_PND
536
`undef SWBRK_PND
537
`endif
538
`ifdef HWBRK0_PND
539
`undef HWBRK0_PND
540
`endif
541
`ifdef HWBRK1_PND
542
`undef HWBRK1_PND
543
`endif
544
 
545
// Debug interface BRKx_CTL register
546
`ifdef BRK_MODE_RD
547
`undef BRK_MODE_RD
548
`endif
549
`ifdef BRK_MODE_WR
550
`undef BRK_MODE_WR
551
`endif
552
`ifdef BRK_MODE
553
`undef BRK_MODE
554
`endif
555
`ifdef BRK_EN
556
`undef BRK_EN
557
`endif
558
`ifdef BRK_I_EN
559
`undef BRK_I_EN
560
`endif
561
`ifdef BRK_RANGE
562
`undef BRK_RANGE
563
`endif
564
 
565
// Basic clock module: BCSCTL1 Control Register
566
`ifdef DIVAx
567
`undef DIVAx
568
`endif
569
 
570
// Basic clock module: BCSCTL2 Control Register
571
`ifdef SELS
572
`undef SELS
573
`endif
574
`ifdef DIVSx
575
`undef DIVSx
576
`endif
577
 
578
 
579
//
580
// DEBUG INTERFACE EXTRA CONFIGURATION
581
//======================================
582
 
583 111 olivier.girard
// Debug interface: CPU version
584
`ifdef CPU_VERSION
585
`undef CPU_VERSION
586
`endif
587
 
588 33 olivier.girard
// Debug interface: Software breakpoint opcode
589
`ifdef DBG_SWBRK_OP
590
`undef DBG_SWBRK_OP
591
`endif
592
 
593
// Debug UART interface auto data synchronization
594
`ifdef DBG_UART_AUTO_SYNC
595
`undef DBG_UART_AUTO_SYNC
596
`endif
597
 
598
// Debug UART interface data rate
599
`ifdef DBG_UART_BAUD
600
`undef DBG_UART_BAUD
601
`endif
602
`ifdef DBG_DCO_FREQ
603
`undef DBG_DCO_FREQ
604
`endif
605
`ifdef DBG_UART_CNT
606
`undef DBG_UART_CNT
607
`endif
608 59 olivier.girard
 
609 111 olivier.girard
// Debug interface selection
610
`ifdef DBG_UART
611
`undef DBG_UART
612
`endif
613
`ifdef DBG_JTAG
614
`undef DBG_JTAG
615
`endif
616
 
617 59 olivier.girard
// Enable/Disable the hardware breakpoint RANGE mode
618
`ifdef HWBRK_RANGE
619
`undef HWBRK_RANGE
620 71 olivier.girard
`endif
621
 
622 74 olivier.girard
// Counter width for the debug interface UART
623
`ifdef DBG_UART_XFER_CNT_W
624
`undef DBG_UART_XFER_CNT_W
625
`endif
626
 
627 71 olivier.girard
//
628
// MULTIPLIER CONFIGURATION
629
//======================================
630
 
631
`ifdef MPY_16x16
632
`undef MPY_16x16
633
`endif

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