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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [tA_capture.v] - Blame information for rev 134

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1 2 olivier.girard
/*===========================================================================*/
2
/* Copyright (C) 2001 Authors                                                */
3
/*                                                                           */
4
/* This source file may be used and distributed without restriction provided */
5
/* that this copyright statement is not removed from the file and that any   */
6
/* derivative work contains the original copyright notice and the associated */
7
/* disclaimer.                                                               */
8
/*                                                                           */
9
/* This source file is free software; you can redistribute it and/or modify  */
10
/* it under the terms of the GNU Lesser General Public License as published  */
11
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12
/* (at your option) any later version.                                       */
13
/*                                                                           */
14
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17
/* License for more details.                                                 */
18
/*                                                                           */
19
/* You should have received a copy of the GNU Lesser General Public License  */
20
/* along with this source; if not, write to the Free Software Foundation,    */
21
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22
/*                                                                           */
23
/*===========================================================================*/
24
/*                                  TIMER A                                  */
25
/*---------------------------------------------------------------------------*/
26
/* Test the timer A:                                                         */
27
/*                        - Check the timer capture unit.                    */
28 18 olivier.girard
/*                                                                           */
29
/* Author(s):                                                                */
30
/*             - Olivier Girard,    olgirard@gmail.com                       */
31
/*                                                                           */
32
/*---------------------------------------------------------------------------*/
33 19 olivier.girard
/* $Rev: 134 $                                                                */
34
/* $LastChangedBy: olivier.girard $                                          */
35
/* $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $          */
36 2 olivier.girard
/*===========================================================================*/
37
 
38
integer my_counter;
39
always @ (posedge mclk)
40
  my_counter <=  my_counter+1;
41
 
42
wire [15:0] tar = timerA_0.tar;
43
 
44
initial
45
   begin
46
      $display(" ===============================================");
47
      $display("|                 START SIMULATION              |");
48
      $display(" ===============================================");
49
      repeat(5) @(posedge mclk);
50
      stimulus_done = 0;
51
 
52 134 olivier.girard
`ifdef ASIC
53
      $display(" ===============================================");
54
      $display("|               SIMULATION SKIPPED              |");
55
      $display("|   (this test is not supported in ASIC mode)   |");
56
      $display(" ===============================================");
57
      $finish;
58
`else
59
 
60 2 olivier.girard
      // TIMER A TEST:  INPUT MUX (CCI)
61
      //--------------------------------------------------------
62
 
63
                                // --------- Comparator 0 ----------
64
      @(mem200 === 16'h0001);
65
      ta_cci0a = 1'b1;
66
      ta_cci0b = 1'b0;
67
      ta_cci1a = 1'b0;
68
      ta_cci1b = 1'b0;
69
      ta_cci2a = 1'b0;
70
      ta_cci2b = 1'b0;
71
      @(mem200 === 16'h0002);
72
      ta_cci0a = 1'b0;
73
      ta_cci0b = 1'b1;
74
      ta_cci1a = 1'b1;
75
      ta_cci1b = 1'b1;
76
      ta_cci2a = 1'b1;
77
      ta_cci2b = 1'b1;
78
      @(mem200 === 16'h0003);
79
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxA =====");
80
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxA =====");
81
 
82
      @(mem200 === 16'h0004);
83
      ta_cci0a = 1'b0;
84
      ta_cci0b = 1'b1;
85
      ta_cci1a = 1'b0;
86
      ta_cci1b = 1'b0;
87
      ta_cci2a = 1'b0;
88
      ta_cci2b = 1'b0;
89
      @(mem200 === 16'h0005);
90
      ta_cci0a = 1'b1;
91
      ta_cci0b = 1'b0;
92
      ta_cci1a = 1'b1;
93
      ta_cci1b = 1'b1;
94
      ta_cci2a = 1'b1;
95
      ta_cci2b = 1'b1;
96
      @(mem200 === 16'h0006);
97
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxB =====");
98
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxB =====");
99
 
100
      @(mem200 === 16'h0007);
101
      ta_cci0a = 1'b0;
102
      ta_cci0b = 1'b0;
103
      ta_cci1a = 1'b0;
104
      ta_cci1b = 1'b0;
105
      ta_cci2a = 1'b0;
106
      ta_cci2b = 1'b0;
107
      @(mem200 === 16'h0008);
108
      ta_cci0a = 1'b1;
109
      ta_cci0b = 1'b1;
110
      ta_cci1a = 1'b1;
111
      ta_cci1b = 1'b1;
112
      ta_cci2a = 1'b1;
113
      ta_cci2b = 1'b1;
114
      @(mem200 === 16'h0009);
115
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - GND =====");
116
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - GND =====");
117
 
118
      @(mem200 === 16'h000A);
119
      ta_cci0a = 1'b0;
120
      ta_cci0b = 1'b0;
121
      ta_cci1a = 1'b0;
122
      ta_cci1b = 1'b0;
123
      ta_cci2a = 1'b0;
124
      ta_cci2b = 1'b0;
125
      @(mem200 === 16'h000B);
126
      ta_cci0a = 1'b1;
127
      ta_cci0b = 1'b1;
128
      ta_cci1a = 1'b1;
129
      ta_cci1b = 1'b1;
130
      ta_cci2a = 1'b1;
131
      ta_cci2b = 1'b1;
132
      @(mem200 === 16'h000C);
133
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - VDD =====");
134
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - VDD =====");
135
 
136
 
137
                                // --------- Comparator 1 ----------
138
      @(mem200 === 16'h0011);
139
      ta_cci0a = 1'b0;
140
      ta_cci0b = 1'b0;
141
      ta_cci1a = 1'b1;
142
      ta_cci1b = 1'b0;
143
      ta_cci2a = 1'b0;
144
      ta_cci2b = 1'b0;
145
      @(mem200 === 16'h0012);
146
      ta_cci0a = 1'b1;
147
      ta_cci0b = 1'b1;
148
      ta_cci1a = 1'b0;
149
      ta_cci1b = 1'b1;
150
      ta_cci2a = 1'b1;
151
      ta_cci2b = 1'b1;
152
      @(mem200 === 16'h0013);
153
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxA =====");
154
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxA =====");
155
 
156
      @(mem200 === 16'h0014);
157
      ta_cci0a = 1'b0;
158
      ta_cci0b = 1'b0;
159
      ta_cci1a = 1'b0;
160
      ta_cci1b = 1'b1;
161
      ta_cci2a = 1'b0;
162
      ta_cci2b = 1'b0;
163
      @(mem200 === 16'h0015);
164
      ta_cci0a = 1'b1;
165
      ta_cci0b = 1'b1;
166
      ta_cci1a = 1'b1;
167
      ta_cci1b = 1'b0;
168
      ta_cci2a = 1'b1;
169
      ta_cci2b = 1'b1;
170
      @(mem200 === 16'h0016);
171
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxB =====");
172
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxB =====");
173
 
174
      @(mem200 === 16'h0017);
175
      ta_cci0a = 1'b0;
176
      ta_cci0b = 1'b0;
177
      ta_cci1a = 1'b0;
178
      ta_cci1b = 1'b0;
179
      ta_cci2a = 1'b0;
180
      ta_cci2b = 1'b0;
181
      @(mem200 === 16'h0018);
182
      ta_cci0a = 1'b1;
183
      ta_cci0b = 1'b1;
184
      ta_cci1a = 1'b1;
185
      ta_cci1b = 1'b1;
186
      ta_cci2a = 1'b1;
187
      ta_cci2b = 1'b1;
188
      @(mem200 === 16'h0019);
189
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - GND =====");
190
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - GND =====");
191
 
192
      @(mem200 === 16'h001A);
193
      ta_cci0a = 1'b0;
194
      ta_cci0b = 1'b0;
195
      ta_cci1a = 1'b0;
196
      ta_cci1b = 1'b0;
197
      ta_cci2a = 1'b0;
198
      ta_cci2b = 1'b0;
199
      @(mem200 === 16'h001B);
200
      ta_cci0a = 1'b1;
201
      ta_cci0b = 1'b1;
202
      ta_cci1a = 1'b1;
203
      ta_cci1b = 1'b1;
204
      ta_cci2a = 1'b1;
205
      ta_cci2b = 1'b1;
206
      @(mem200 === 16'h001C);
207
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - VDD =====");
208
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - VDD =====");
209
 
210
 
211
                                // --------- Comparator 2 ----------
212
      @(mem200 === 16'h0021);
213
      ta_cci0a = 1'b0;
214
      ta_cci0b = 1'b0;
215
      ta_cci1a = 1'b0;
216
      ta_cci1b = 1'b0;
217
      ta_cci2a = 1'b1;
218
      ta_cci2b = 1'b0;
219
      @(mem200 === 16'h0022);
220
      ta_cci0a = 1'b1;
221
      ta_cci0b = 1'b1;
222
      ta_cci1a = 1'b1;
223
      ta_cci1b = 1'b1;
224
      ta_cci2a = 1'b0;
225
      ta_cci2b = 1'b1;
226
      @(mem200 === 16'h0023);
227
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxA =====");
228
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxA =====");
229
 
230
      @(mem200 === 16'h0024);
231
      ta_cci0a = 1'b0;
232
      ta_cci0b = 1'b0;
233
      ta_cci1a = 1'b0;
234
      ta_cci1b = 1'b0;
235
      ta_cci2a = 1'b0;
236
      ta_cci2b = 1'b1;
237
      @(mem200 === 16'h0025);
238
      ta_cci0a = 1'b1;
239
      ta_cci0b = 1'b1;
240
      ta_cci1a = 1'b1;
241
      ta_cci1b = 1'b1;
242
      ta_cci2a = 1'b1;
243
      ta_cci2b = 1'b0;
244
      @(mem200 === 16'h0026);
245
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxB =====");
246
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxB =====");
247
 
248
      @(mem200 === 16'h0027);
249
      ta_cci0a = 1'b0;
250
      ta_cci0b = 1'b0;
251
      ta_cci1a = 1'b0;
252
      ta_cci1b = 1'b0;
253
      ta_cci2a = 1'b0;
254
      ta_cci2b = 1'b0;
255
      @(mem200 === 16'h0028);
256
      ta_cci0a = 1'b1;
257
      ta_cci0b = 1'b1;
258
      ta_cci1a = 1'b1;
259
      ta_cci1b = 1'b1;
260
      ta_cci2a = 1'b1;
261
      ta_cci2b = 1'b1;
262
      @(mem200 === 16'h0029);
263
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - GND =====");
264
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - GND =====");
265
 
266
      @(mem200 === 16'h002A);
267
      ta_cci0a = 1'b0;
268
      ta_cci0b = 1'b0;
269
      ta_cci1a = 1'b0;
270
      ta_cci1b = 1'b0;
271
      ta_cci2a = 1'b0;
272
      ta_cci2b = 1'b0;
273
      @(mem200 === 16'h002B);
274
      ta_cci0a = 1'b1;
275
      ta_cci0b = 1'b1;
276
      ta_cci1a = 1'b1;
277
      ta_cci1b = 1'b1;
278
      ta_cci2a = 1'b1;
279
      ta_cci2b = 1'b1;
280
      @(mem200 === 16'h002C);
281
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - VDD =====");
282
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - VDD =====");
283
      ta_cci0a = 1'b0;
284
      ta_cci0b = 1'b0;
285
      ta_cci1a = 1'b0;
286
      ta_cci1b = 1'b0;
287
      ta_cci2a = 1'b0;
288
      ta_cci2b = 1'b0;
289
 
290
 
291
      // TIMER A TEST:  CAPTURE, EDGE SELECTION AND INTERRUPT
292
      //--------------------------------------------------------
293
      @(r15 === 16'h1000);
294
 
295
                                // --------- Comparator 0 ----------
296
      @(mem200 === 16'h0001);
297
      ta_cci0a = 1'b1;
298
      repeat(5) @(posedge mclk);
299
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 1 =====");
300
      @(mem200 === 16'h0002);
301
      ta_cci0a = 1'b0;
302
      repeat(5) @(posedge mclk);
303
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 2 =====");
304
      @(mem200 === 16'h0003);
305
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 3 =====");
306
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 4 =====");
307
 
308
      @(mem200 === 16'h0004);
309
      ta_cci0a = 1'b1;
310
      repeat(5) @(posedge mclk);
311
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 1 =====");
312
      @(mem200 === 16'h0005);
313
      ta_cci0a = 1'b0;
314
      repeat(5) @(posedge mclk);
315
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 2 =====");
316
      @(mem200 === 16'h0006);
317
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 3 =====");
318
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 4 =====");
319
 
320
      @(mem200 === 16'h0007);
321
      ta_cci0a = 1'b1;
322
      repeat(5) @(posedge mclk);
323
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 1 =====");
324
      @(mem200 === 16'h0008);
325
      ta_cci0a = 1'b0;
326
      repeat(5) @(posedge mclk);
327
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 2 =====");
328
      @(mem200 === 16'h0009);
329
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 3 =====");
330
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 4 =====");
331
 
332
      @(mem200 === 16'h000A);
333
      ta_cci0a = 1'b1;
334
      repeat(5) @(posedge mclk);
335
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 1 =====");
336
      @(mem200 === 16'h000B);
337
      ta_cci0a = 1'b0;
338
      repeat(5) @(posedge mclk);
339
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 2 =====");
340
      @(mem200 === 16'h000C);
341
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 3 =====");
342
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 4 =====");
343
 
344
 
345
                                // --------- comparator 1 ----------
346
      @(mem200 === 16'h0001);
347
      ta_cci1a = 1'b1;
348
      repeat(5) @(posedge mclk);
349
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 1 =====");
350
      @(mem200 === 16'h0002);
351
      ta_cci1a = 1'b0;
352
      repeat(5) @(posedge mclk);
353
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 2 =====");
354
      @(mem200 === 16'h0003);
355
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 3 =====");
356
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 4 =====");
357
 
358
      @(mem200 === 16'h0004);
359
      ta_cci1a = 1'b1;
360
      repeat(5) @(posedge mclk);
361
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 1 =====");
362
      @(mem200 === 16'h0005);
363
      ta_cci1a = 1'b0;
364
      repeat(5) @(posedge mclk);
365
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 2 =====");
366
      @(mem200 === 16'h0006);
367
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 3 =====");
368
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 4 =====");
369
 
370
      @(mem200 === 16'h0007);
371
      ta_cci1a = 1'b1;
372
      repeat(5) @(posedge mclk);
373
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 1 =====");
374
      @(mem200 === 16'h0008);
375
      ta_cci1a = 1'b0;
376
      repeat(5) @(posedge mclk);
377
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 2 =====");
378
      @(mem200 === 16'h0009);
379
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 3 =====");
380
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 4 =====");
381
 
382
      @(mem200 === 16'h000A);
383
      ta_cci1a = 1'b1;
384
      repeat(5) @(posedge mclk);
385
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 1 =====");
386
      @(mem200 === 16'h000B);
387
      ta_cci1a = 1'b0;
388
      repeat(5) @(posedge mclk);
389
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 2 =====");
390
      @(mem200 === 16'h000C);
391
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 3 =====");
392
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 4 =====");
393
 
394
 
395
                                // --------- comparator 2 ----------
396
      @(mem200 === 16'h0001);
397
      ta_cci2a = 1'b1;
398
      repeat(5) @(posedge mclk);
399
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 1 =====");
400
      @(mem200 === 16'h0002);
401
      ta_cci2a = 1'b0;
402
      repeat(5) @(posedge mclk);
403
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 2 =====");
404
      @(mem200 === 16'h0003);
405
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 3 =====");
406
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 4 =====");
407
 
408
      @(mem200 === 16'h0004);
409
      ta_cci2a = 1'b1;
410
      repeat(5) @(posedge mclk);
411
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 1 =====");
412
      @(mem200 === 16'h0005);
413
      ta_cci2a = 1'b0;
414
      repeat(5) @(posedge mclk);
415
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 2 =====");
416
      @(mem200 === 16'h0006);
417
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 3 =====");
418
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 4 =====");
419
 
420
      @(mem200 === 16'h0007);
421
      ta_cci2a = 1'b1;
422
      repeat(5) @(posedge mclk);
423
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 1 =====");
424
      @(mem200 === 16'h0008);
425
      ta_cci2a = 1'b0;
426
      repeat(5) @(posedge mclk);
427
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 2 =====");
428
      @(mem200 === 16'h0009);
429
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 3 =====");
430
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 4 =====");
431
 
432
      @(mem200 === 16'h000A);
433
      ta_cci2a = 1'b1;
434
      repeat(5) @(posedge mclk);
435
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 1 =====");
436
      @(mem200 === 16'h000B);
437
      ta_cci2a = 1'b0;
438
      repeat(5) @(posedge mclk);
439
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 2 =====");
440
      @(mem200 === 16'h000C);
441
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 3 =====");
442
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 4 =====");
443
 
444
 
445
      // TIMER A TEST:  CAPTURE OVERFLOW
446
      //--------------------------------------------------------
447
      @(r15 === 16'h2000);
448
 
449
                                // --------- Comparator 0 ----------
450
      @(mem200 === 16'h0001);
451
      ta_cci0a = 1'b1;
452
      @(mem200 === 16'h0002);
453
      ta_cci0a = 1'b0;
454
      @(mem200 === 16'h0003);
455
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
456
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
457
 
458
      @(mem200 === 16'h0004);
459
      ta_cci0a = 1'b1;
460
      @(mem200 === 16'h0005);
461
      ta_cci0a = 1'b0;
462
      @(mem200 === 16'h0006);
463
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
464
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
465
 
466
 
467
                                // --------- Comparator 1 ----------
468
      @(mem200 === 16'h0001);
469
      ta_cci1a = 1'b1;
470
      @(mem200 === 16'h0002);
471
      ta_cci1a = 1'b0;
472
      @(mem200 === 16'h0003);
473
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
474
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
475
 
476
      @(mem200 === 16'h0004);
477
      ta_cci1a = 1'b1;
478
      @(mem200 === 16'h0005);
479
      ta_cci1a = 1'b0;
480
      @(mem200 === 16'h0006);
481
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
482
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
483
 
484
 
485
                                // --------- Comparator 2 ----------
486
      @(mem200 === 16'h0001);
487
      ta_cci2a = 1'b1;
488
      @(mem200 === 16'h0002);
489
      ta_cci2a = 1'b0;
490
      @(mem200 === 16'h0003);
491
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
492
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
493
 
494
      @(mem200 === 16'h0004);
495
      ta_cci2a = 1'b1;
496
      @(mem200 === 16'h0005);
497
      ta_cci2a = 1'b0;
498
      @(mem200 === 16'h0006);
499
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
500
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
501
 
502
 
503 134 olivier.girard
`endif
504
 
505 2 olivier.girard
      stimulus_done = 1;
506
   end
507
 

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