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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_sxt.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 olivier.girard
/*===========================================================================*/
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/* Copyright (C) 2001 Authors                                                */
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/*                                                                           */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any   */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer.                                                               */
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/*                                                                           */
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/* This source file is free software; you can redistribute it and/or modify  */
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/* it under the terms of the GNU Lesser General Public License as published  */
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/* by the Free Software Foundation; either version 2.1 of the License, or    */
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/* (at your option) any later version.                                       */
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/*                                                                           */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
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/* License for more details.                                                 */
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/*                                                                           */
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/* You should have received a copy of the GNU Lesser General Public License  */
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/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
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/*===========================================================================*/
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/*                 SINGLE-OPERAND ARITHMETIC: SXT  INSTRUCTION               */
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/*---------------------------------------------------------------------------*/
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/* Test the SXT instruction.                                                 */
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/*===========================================================================*/
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initial
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   begin
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      $display(" ===============================================");
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      $display("|                 START SIMULATION              |");
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      $display(" ===============================================");
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      repeat(5) @(posedge mclk);
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      stimulus_done = 0;
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      // Addressing mode: Rn
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      @(r15==16'h1000);
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      if (r4     !==16'h0024) tb_error("====== SXT (Rn mode): test 1 (result) =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (Rn mode): test 1 (C flag) =====");
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      if (r6     !==16'hffb6) tb_error("====== SXT (Rn mode): test 2 (result) =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (Rn mode): test 2 (C flag) =====");
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      // Addressing mode: @Rn
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      @(r15==16'h2000);
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      if (mem200 !==16'h0024) tb_error("====== SXT (@Rn mode): test 1 (result)  =====");
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      if (r4     !==16'h0200) tb_error("====== SXT (@Rn mode): test 1 (address) =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (@Rn mode): test 1 (C flag)  =====");
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      if (mem202 !==16'hffb6) tb_error("====== SXT (@Rn mode): test 2 (result)  =====");
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      if (r6     !==16'h0202) tb_error("====== SXT (@Rn mode): test 2 (address) =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (@Rn mode): test 2 (C flag)  =====");
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      // Addressing mode: @Rn+
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      @(r15==16'h3000);
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      if (mem208 !==16'h0024) tb_error("====== SXT (@Rn+ mode): test 1 (result)  =====");
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      if (r4     !==16'h020A) tb_error("====== SXT (@Rn+ mode): test 1 (address) =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (@Rn+ mode): test 1 (C flag)  =====");
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      if (mem20A !==16'hffb6) tb_error("====== SXT (@Rn+ mode): test 2 (result)  =====");
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      if (r6     !==16'h020C) tb_error("====== SXT (@Rn+ mode): test 2 (address) =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (@Rn+ mode): test 2 (C flag)  =====");
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      // Addressing mode: X(Rn)
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      @(r15==16'h4000);
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      if (mem210 !==16'h0024) tb_error("====== SXT (X(Rn) mode): test 1 (result)  =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (X(Rn) mode): test 1 (C flag)  =====");
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      if (mem212 !==16'hffb6) tb_error("====== SXT (X(Rn) mode): test 2 (result)  =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (X(Rn) mode): test 2 (C flag)  =====");
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      // Addressing mode: EDE
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      @(r15==16'h5000);
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      if (mem218 !==16'h0024) tb_error("====== SXT (EDE mode): test 1 (result)  =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (EDE mode): test 1 (C flag)  =====");
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      if (mem21A !==16'hffb6) tb_error("====== SXT (EDE mode): test 2 (result)  =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (EDE mode): test 2 (C flag)  =====");
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      // Addressing mode: &EDE
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      @(r15==16'h6000);
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      if (mem220 !==16'h0024) tb_error("====== SXT (&EDE mode): test 1 (result)  =====");
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      if (r5     !==16'h0001) tb_error("====== SXT (&EDE mode): test 1 (C flag)  =====");
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      if (mem222 !==16'hffb6) tb_error("====== SXT (&EDE mode): test 2 (result)  =====");
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      if (r7     !==16'h0005) tb_error("====== SXT (&EDE mode): test 2 (C flag)  =====");
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      stimulus_done = 1;
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   end
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