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[/] [ha1588/] [trunk/] [sim/] [top/] [ptp_drv_bfm/] [ptp_drv_bfm.v] - Blame information for rev 24

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Line No. Rev Author Line
1 21 edn_walter
`timescale 1ns/1ns
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module ptp_drv_bfm_sv
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(
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        input         up_clk,
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        output        up_wr,
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        output        up_rd,
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        output [ 7:0] up_addr,
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        output [31:0] up_data_wr,
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        input  [31:0] up_data_rd
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);
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import "DPI-C" context task ptp_drv_bfm_c
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(
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        input real fw_delay
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);
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reg  [ 7:0] up_addr_o;
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reg  [31:0] up_data_o;
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wire [31:0] up_data_i;
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reg         up_wr_o;
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reg         up_rd_o;
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export "DPI-C" task cpu_wr;
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task cpu_wr(input int addr, input int data);
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        integer i;
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        //$display("wr %08x %08x", addr, data);
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        for (i=0; i<1; i=i+1) @(posedge up_clk);
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        up_addr_o = addr;
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        up_data_o = data;
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        up_wr_o   = 1'b1;
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        for (i=0; i<1; i=i+1) @(posedge up_clk);
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        up_addr_o = addr;
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        up_data_o = data;
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        up_wr_o   = 1'b0;
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        for (i=0; i<1; i=i+1) @(posedge up_clk);
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endtask
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export "DPI-C" task cpu_rd;
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task cpu_rd(input int addr, output int data);
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        integer i;
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        for (i=0; i<2; i=i+1) @(posedge up_clk);
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        up_addr_o = addr;
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        up_rd_o   = 1'b1;
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        for (i=0; i<1; i=i+1) @(posedge up_clk);
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        up_addr_o = addr;
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        up_rd_o   = 1'b0;
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        for (i=0; i<2; i=i+1) @(posedge up_clk);
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        data      = up_data_rd;
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        //$display("rd %08x %08x", addr, data);
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endtask
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export "DPI-C" task cpu_hd;
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task cpu_hd(input int t);
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        integer i;
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        //$display("#%d",t);
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        for (i=0; i<=t; i=i+1) @(posedge up_clk);
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endtask
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assign up_wr      = up_wr_o;
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assign up_rd      = up_rd_o;
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assign up_addr    = up_addr_o;
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assign up_data_wr = up_data_o;
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assign up_data_i  = up_data_rd;
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// start cpu bfm C model
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reg up_start;
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initial begin
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        up_wr_o   = 1'b0;
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        up_rd_o   = 1'b0;
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        up_addr_o = 'd0;
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        up_data_o = 'd0;
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        @(posedge up_start);
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        #100 ptp_drv_bfm_c(5);
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end
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endmodule

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