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[/] [connect-6/] [trunk/] [XILINX/] [BUILD_SCC_SRCH/] [SP6/] [safe_test.vhd] - Blame information for rev 17

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1 17 sumanta.chaudhuri
library ieee;
2
use ieee.std_logic_1164.all;
3
--use ieee.numeric_bit.all;
4
use ieee.std_logic_arith.all;
5
 
6
 
7
 
8
entity safe_test is
9
generic(INPUT_LENGTH:integer:=6;OUTPUT_LENGTH:integer:=6);
10
        port(
11
                clk:in std_ulogic;
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                rst:in std_ulogic;
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                --Config Signals
14
                init_out:out std_ulogic;
15
                config_mode_out:out std_ulogic;
16
                config_out0:out std_ulogic;
17
                config_out1:out std_ulogic;
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                config_ack_in:in std_ulogic;
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                --DE2 Control SIgnals
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                msg_out:out std_ulogic_vector(2 downto 0);
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                Ack_count_out:out std_logic_vector(31 downto 0);
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                cmd:in std_ulogic_vector(4 downto 0);
23
                --SRAM
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                SRAM_DATA_OUT: OUT std_logic_vector(15 downto 0);
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                SRAM_DATA: in std_logic_vector(15 downto 0);
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                SRAM_ADDR: out std_logic_vector(23 downto 0);
27
                SRAM_WEN:  out std_logic;
28
                SRAM_OEN:  out std_logic;
29
                --SDRAM
30
                SDRAM_DATA: out std_logic_vector(15 downto 0);
31
                SDRAM_ADDR: out std_logic_vector(23 downto 0);
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                SDRAM_WEN:  out std_logic;
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                SDRAM_OEN:  out std_logic;
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                --Result Vectors
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                INPUT_ASYNC_0: in std_ulogic_vector(INPUT_LENGTH-1 downto 0);
36
                INPUT_ASYNC_1: in std_ulogic_vector(INPUT_LENGTH-1 downto 0);
37
                INPUT_ASYNC_ACKOUT: out std_ulogic_vector(INPUT_LENGTH-1 downto 0);
38
                --Test Vectors
39
                OUTPUT_ASYNC_0: out std_ulogic_vector(OUTPUT_LENGTH-1 downto 0);
40
                OUTPUT_ASYNC_1: out std_ulogic_vector(OUTPUT_LENGTH-1 downto 0);
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                OUTPUT_ASYNC_ACKIN: in std_ulogic_vector(OUTPUT_LENGTH-1 downto 0);
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43
                --Trigger for oscilloscope
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                trigger: out std_ulogic
45
 
46
                );
47
end entity safe_test;
48
 
49
 
50
architecture machine_a_etat of safe_test is
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component S_TO_AS_CONFIG is
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generic (BEGIN_ADDR:integer:=0;END_ADDR:integer:=0;LENGTH:integer:=16);
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        port(
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                clk:in std_ulogic;
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                rst:in std_ulogic;
56
 
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                SRAM_DATA_OUT: out std_logic_vector(15 downto 0);
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                SRAM_DATA: in std_logic_vector(15 downto 0);
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                SRAM_ADDR: out std_logic_vector(23 downto 0);
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                SRAM_WEN:  out std_logic;
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                SRAM_OEN:  out std_logic;
62
 
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                AS_OUT0: out std_ulogic;
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                AS_OUT1: out std_ulogic;
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                ACK_IN:  in std_ulogic;
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                config_enable: in std_ulogic; -- Command from the state_machine up there
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                ACK_COUNT_OUT: out std_logic_vector(31 downto 0)
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                );
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end component S_TO_AS_CONFIG;
71
 
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component AS_TO_S_VECTOR is
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generic (BEGIN_ADDR:integer:=0;END_ADDR:integer:=0;LENGTH:integer:=16);
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        port(
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                clk:in std_ulogic;
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                rst:in std_ulogic;
77
 
78
                SRAM_DATA: out std_logic_vector(15 downto 0);
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                SRAM_ADDR: out std_logic_vector(23 downto 0);
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                SRAM_WEN:  out std_logic;
81
                SRAM_OEN:  out std_logic;
82
 
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                I_ASYNC_0: in std_ulogic_vector(LENGTH-1 downto 0);
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                I_ASYNC_1: in std_ulogic_vector(LENGTH-1 downto 0);
85
                I_ASYNC_ACK_OUT:  out std_ulogic_vector(LENGTH-1 downto 0);
86
 
87
                vector_enable: in std_ulogic; -- Command from the state_machine up there
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                ACK_COUNT_OUT: out std_logic_vector(31 downto 0)
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                );
90
end component AS_TO_S_VECTOR;
91
 
92
component S_TO_AS_VECTOR is
93
generic (BEGIN_ADDR:integer:=0;END_ADDR:integer:=0;LENGTH:integer:=16);
94
        port(
95
                clk:in std_ulogic;
96
                rst:in std_ulogic;
97
                trigger:out std_ulogic;
98
 
99
                SRAM_DATA: in std_logic_vector(15 downto 0);
100
                SRAM_ADDR: out std_logic_vector(23 downto 0);
101
                SRAM_WEN:  out std_logic;
102
                SRAM_OEN:  out std_logic;
103
 
104
                O_ASYNC_0: out std_ulogic_vector(LENGTH-1 downto 0);
105
                O_ASYNC_1: out std_ulogic_vector(LENGTH-1 downto 0);
106
                O_ASYNC_ACK_IN:  in std_ulogic_vector(LENGTH-1 downto 0);
107
 
108
                vector_enable: in std_ulogic; -- Command from the state_machine up there
109
                ACK_COUNT_OUT: out std_logic_vector(31 downto 0)
110
                );
111
end component S_TO_AS_VECTOR;
112
 
113
--type STATE_TYPE is(IDLE,INIT,CONFIG,RUNNING);
114
--signal state,next_state:STATE_TYPE;
115
signal msg_out_int:std_ulogic_vector(2 downto 0);
116
signal count:integer range 0 to integer'high;
117
signal count_in,count_out:std_logic_vector(31 downto 0);
118
signal config_enable,run_enable,safe_rst:std_ulogic;
119
signal SRAM_DATA_TEST,SRAM_DATA_CONFIG:std_logic_vector(15 downto 0);
120
signal SRAM_ADDR_TEST,SRAM_ADDR_CONFIG:std_logic_vector(23 downto 0);
121
signal SRAM_WEN_CONFIG,SRAM_WEN_TEST,SRAM_OEN_CONFIG,SRAM_OEN_TEST:std_logic;
122
signal trig_count:integer range 0 to integer'high;
123
begin
124
        msg_out<=msg_out_int;
125
        TRANSLATE: S_TO_AS_CONFIG
126
                                generic map(BEGIN_ADDR=>0,END_ADDR=>293,LENGTH=>1)
127
                                port map(
128
                                        clk=>clk,
129
                                        rst=>rst,
130
 
131
                                        SRAM_DATA_OUT=>SRAM_DATA_OUT,
132
                                        SRAM_DATA=>SRAM_DATA,
133
                                        SRAM_ADDR=>SRAM_ADDR_CONFIG,
134
                                        SRAM_WEN=>SRAM_WEN_CONFIG,
135
                                        SRAM_OEN=>SRAM_OEN_CONFIG,
136
 
137
                                        AS_OUT0=>config_out0,
138
                                        AS_OUT1=>config_out1,
139
                                        ACK_IN=>config_ack_in,
140
 
141
                                        config_enable=>config_enable,
142
                                        ACK_COUNT_OUT=>Ack_count_out);
143
 
144
 
145
        TRANSLATE_S_TO_AS:S_TO_AS_VECTOR
146
        generic map(BEGIN_ADDR=>4096,END_ADDR=>4159,LENGTH=>OUTPUT_LENGTH)
147
                port map(
148
                        clk=>clk,
149
                        rst=>safe_rst,
150
                        trigger=>trigger,
151
 
152
                        SRAM_DATA=>SRAM_DATA,
153
                        SRAM_ADDR=>SRAM_ADDR_TEST,
154
                        SRAM_WEN=>SRAM_WEN_TEST,
155
                        SRAM_OEN=>SRAM_OEN_TEST,
156
 
157
                        O_ASYNC_0=>OUTPUT_ASYNC_0,
158
                        O_ASYNC_1=>OUTPUT_ASYNC_1,
159
                        O_ASYNC_ACK_IN=>OUTPUT_ASYNC_ACKIN,
160
 
161
                        vector_enable=>run_enable,
162
                        ACK_COUNT_OUT=>count_out
163
                        );
164
        TRANSLATE_AS_TO_S:AS_TO_S_VECTOR
165
        generic map(BEGIN_ADDR=>0,END_ADDR=>63,LENGTH=>INPUT_LENGTH)
166
                port map(
167
                        clk=>clk,
168
                        rst=>safe_rst,
169
 
170
                        SRAM_DATA=>SDRAM_DATA,
171
                        SRAM_ADDR=>SDRAM_ADDR,
172
                        SRAM_WEN=>SDRAM_WEN,
173
                        SRAM_OEN=>SDRAM_OEN,
174
 
175
                        I_ASYNC_0=>INPUT_ASYNC_0,
176
                        I_ASYNC_1=>INPUT_ASYNC_1,
177
                        I_ASYNC_ACK_OUT=>INPUT_ASYNC_ACKOUT,
178
 
179
                        vector_enable=>run_enable,
180
                        ACK_COUNT_OUT=>count_in
181
                        );
182
        p1:process(cmd,SRAM_ADDR_CONFIG,SRAM_WEN_CONFIG,SRAM_OEN_CONFIG,SRAM_ADDR_TEST,SRAM_WEN_TEST,SRAM_OEN_TEST)
183
        begin
184
--              if(rst='0') then
185
--                      --state<=IDLE;
186
--                      msg_out_int<="111";
187
--                      init_out<='0';
188
--                      config_mode_out<='0';
189
--                      config_enable<='0';
190
--                      I_OL7_JP2_53<='0';              
191
--              elsif rising_edge(clk) then
192
                --      state<=next_state;
193
                        case cmd is
194
                                when "00000"=>--IDLE
195
                                        msg_out_int<="111";
196
                                        init_out<='0';
197
                                        config_mode_out<='0';
198
                                        config_enable<='0';
199
                                        run_enable<='0';
200
                                        SRAM_ADDR<=SRAM_ADDR_CONFIG;
201
                                        SRAM_WEN<=SRAM_WEN_CONFIG;
202
                                        SRAM_OEN<=SRAM_OEN_CONFIG;
203
                                        safe_rst<='0';
204
 
205
                                when "00001"=>--CONNECTED
206
                                        msg_out_int<="000";
207
                                        init_out<='0';
208
                                        config_mode_out<='0';
209
                                        config_enable<='0';
210
                                        run_enable<='0';
211
                                        SRAM_ADDR<=SRAM_ADDR_CONFIG;
212
                                        SRAM_WEN<=SRAM_WEN_CONFIG;
213
                                        SRAM_OEN<=SRAM_OEN_CONFIG;
214
                                        safe_rst<='0';
215
 
216
                                when "00011"=>--INIT
217
                                        msg_out_int<="001";
218
                                        init_out<='0';
219
                                        config_mode_out<='0';
220
                                        config_enable<='0';
221
                                        run_enable<='0';
222
                                        SRAM_ADDR<=SRAM_ADDR_CONFIG;
223
                                        SRAM_WEN<=SRAM_WEN_CONFIG;
224
                                        SRAM_OEN<=SRAM_OEN_CONFIG;
225
                                        safe_rst<='0';
226
 
227
                                when "00101"=>--CONFIG
228
                                        msg_out_int<="010";
229
                                        init_out<='1';
230
                                        config_mode_out<='0';
231
                                        config_enable<='1';
232
                                        run_enable<='0';
233
                                        SRAM_ADDR<=SRAM_ADDR_CONFIG;
234
                                        SRAM_WEN<=SRAM_WEN_CONFIG;
235
                                        SRAM_OEN<=SRAM_OEN_CONFIG;
236
                                        safe_rst<='0';
237
 
238
                                when "10001"=>--SAFE_RESET,Only I/Os there is no reset for safe!! 
239
                                        msg_out_int<="011";
240
                                        init_out<='1';
241
                                        config_mode_out<='1';
242
                                        config_enable<='1';
243
                                        run_enable<='0';
244
                                        SRAM_ADDR<=SRAM_ADDR_TEST;
245
                                        SRAM_WEN<=SRAM_WEN_TEST;
246
                                        SRAM_OEN<=SRAM_OEN_TEST;
247
                                        safe_rst<='0';
248
                                when "01001"=>--RUNNING
249
                                        msg_out_int<="011";
250
                                        init_out<='1';
251
                                        config_mode_out<='1';
252
                                        config_enable<='1';
253
                                        run_enable<='1';
254
                                        SRAM_ADDR<=SRAM_ADDR_TEST;
255
                                        SRAM_WEN<=SRAM_WEN_TEST;
256
                                        SRAM_OEN<=SRAM_OEN_TEST;
257
                                        safe_rst<='1';
258
 
259
                                when others=>
260
                                        msg_out_int<= "111";
261
                                        init_out<='1';
262
                                        config_mode_out<='0';
263
                                        config_enable<='0';
264
                                        run_enable<='0';
265
                                        SRAM_ADDR<=SRAM_ADDR_CONFIG;
266
                                        SRAM_WEN<=SRAM_WEN_CONFIG;
267
                                        SRAM_OEN<=SRAM_OEN_CONFIG;
268
                                        safe_rst<='0';
269
                        end case;
270
--              end if;
271
        end process;
272
 
273
--      p2:process(state,init_config,config_mode)
274
--      begin
275
--              case state is
276
--                      
277
--                      when IDLE=>
278
--                                      if(init_config='0') then 
279
--                                              next_state<=INIT;
280
--                                      else
281
--                                              next_state<=IDLE;
282
--                                      end if;
283
----                    when CONNECT=>
284
----                                    
285
----                                    if(init_config='0') then 
286
----                                            next_state<= INIT;
287
----                                    else
288
----                                            next_state<= CONNECT;
289
----                                    end if;
290
--
291
--                      when INIT=>
292
--                                      if(config_mode='1') then
293
--                                              next_state<=CONFIG;
294
--                                      else 
295
--                                              next_state<=INIT;
296
--                                      end if;
297
--
298
--                      when CONFIG=>
299
--              --                      if(init_config='0') then
300
--              --                              next_state<=INIT;
301
--                                      if(config_mode='0') then
302
--                                              next_state<=RUNNING;
303
--                                      elsif(config_mode='1') then
304
--                                              next_state<=CONFIG;
305
--                                      end if;
306
--
307
--                      when RUNNING=>
308
--                                      --if(init_config='0') then
309
--                                      --      next_state<=INIT;
310
--                                      if(config_mode='1') then
311
--                                              next_state<=CONFIG;
312
--                                      elsif(config_mode='0') then
313
--                                              next_state<=RUNNING;
314
--                                      end if;
315
--
316
--                      when others=>
317
--                                      next_state<=state;
318
--              end case;
319
--      end process;
320
 
321
--      p3:process(state)
322
--      begin
323
--              case state is
324
--                      when IDLE=>
325
--                              msg_out_int<="111";
326
--                              init_out<='0';
327
--                              config_mode_out<='0';
328
--                              config_enable<='0';
329
--                              I_OL7_JP2_53<='0';              
330
--                      
331
--                      when CONNECT=>
332
--                              msg_out_int<="000";
333
--                              init_out<='0';
334
--                              config_mode_out<='0';
335
--                              config_enable<='0';
336
--                              I_OL7_JP2_53<='0';              
337
--
338
--                      when INIT=>
339
--                              msg_out_int<="001";
340
--                              init_out<='0';
341
--                              config_mode_out<='0';
342
--                              config_enable<='0';
343
--                              I_OL7_JP2_53<='0';              
344
--
345
--                      when CONFIG=>
346
--                              msg_out_int<="010";
347
--                              init_out<='1';
348
--                              config_mode_out<='0';
349
--                              config_enable<='1';
350
--                              I_OL7_JP2_53<='0';              
351
--
352
--                      when RUNNING=>
353
--                              msg_out_int<="011";
354
--                              init_out<='1';
355
--                              config_mode_out<='1';
356
--                              config_enable<='0';
357
--                              I_OL7_JP2_53<='1';              
358
--                      
359
--                      when others=>
360
--                              msg_out_int<= "111";
361
--                              init_out<='1';
362
--                              config_mode_out<='0';
363
--                              config_enable<='0';
364
--                              I_OL7_JP2_53<='0';              
365
--              end case;
366
--      end process;
367
--      --Main State Machine------------------------------------
368
--p_trigger:process(clk,rst)
369
--      begin
370
--      if(rst='0') then
371
--              trig_count<=0;
372
--              trigger<='0';
373
--      elsif rising_edge(clk) then
374
--              trig_count<=trig_count+1;
375
--              if(trig_count=1024) then
376
--                      trigger<='1';
377
--              elsif(trig_count=2048) then
378
--                      trig_count<=0;
379
--                      trigger<='0';
380
--              end if;
381
--      end if;
382
--      end process;
383
--trigger<=clk;
384
end architecture machine_a_etat;

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