OpenCores
Projects/cores: Written in: Stage: License:

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Arithmetic core
Project Files Statistics Status License
5x4Gbps CRC generator... Yes Stats Done GPL
Anti-Logarithm (square-root),... Yes Stats New Done LGPL
Cellular Automata PRNG Yes Stats Done BSD
configurable cordic core in... Yes Stats Done
* CORDIC core Yes Stats Done OCCP GPL
Discrete Cosine Transform core Yes Stats Done
double_fpu_verilog Yes Stats Done
ecpu_alu Yes Stats Done GPL
Floating Point Adder and... Yes Stats Done
FPU Double VHDL Yes Stats Done
LFSR-Random number generator Yes Stats Done LGPL
Logarithm function, base-2,... Yes Stats Done LGPL
Reed-Solomon Decoder Yes Stats Done LGPL
Single Clock Unsigned... Yes Stats Done
Sinusoidal Computator Yes Stats Done LGPL
Versatile counter Yes Stats Done LGPL
Viterbi HDL Code Generator Yes Stats Done GPL

Prototype board
Project Files Statistics Status License
EUS FS - Alice II -... Yes Stats Done
kiss-board Yes Stats Done Wbc
MAXII-Evalboard Yes Stats Done
Milkymist One interactive VJ... No Stats Done Others
PCI Board Yes Stats Done GPL
USB FPGA MODULE 1.2 Yes Stats Done GPL

Communication controller
Project Files Statistics Status License
10_100_1000 Mbps tri-mode... Yes Stats Done LGPL
8b10b Encoder/Decoder Yes Stats Done GPL
a VHDL 16550 UART core Yes Stats Done
A VHDL CAN Protocol Controller Yes Stats Done
DMX512 transceiver Yes Stats New Done GPL
EBU/spdif to I2S project Yes Stats Done
Ethernet 10GE MAC Yes Stats Done Wbc LGPL
HyperTransport Tunnel Yes Stats Done
* I2C controller core Yes Stats Done Wbc OCCP BSD
I2C Master Slave Core Yes Stats Done BSD
I2C Slave Yes Stats Done GPL
I2S Interface Yes Stats Done Wbc GPL
I2S to Parallel Interface Yes Stats Done GPL
MADI Receiver Yes Stats Done LGPL
Minimac - the minimalist... Yes Stats Done Wbc GPL
OPB-compatible OneWire Master Yes Stats Done GPL
RXAUI Interface and XAUI to... No Stats Done
* sd card controller Yes Stats Done Wbc OCCP LGPL
SD/MMC Bootloader Yes Stats Done GPL
SD/MMC Controller Yes Stats Done Wbc GPL
Simple AES3 / SPDIF receiver Yes Stats Done LGPL
Simple RS232 UART Yes Stats Done GPL
SPDIF Interface Yes Stats Done Wbc LGPL
SPI core Yes Stats Done Wbc
SPI Flash controller Yes Stats Done GPL
spi master receiver for ADC... Yes Stats Done LGPL
SystemC USB1.1 IP Core Yes Stats Done
* UART to Bus Yes Stats Done OCCP LGPL
UART16750 Yes Stats Done LGPL
USB 1.1 Host and Function IP... Yes Stats Done Wbc LGPL
Wishbone LPC Host and... Yes Stats Done Wbc LGPL

Crypto core
Project Files Statistics Status License
A5 Cipher No Stats Done LGPL
AES core modules Yes Stats Done
AES128 Yes Stats Done LGPL
* Avalon AES ECB-Core (128,... Yes Stats Done OCCP BSD
Crypto-PAn Yes Stats Done GPL
csa Yes Stats Done
Mini AES Yes Stats Done BSD
Nugroho Free Hash Cores Yes Stats Done BSD
Pipelined AES Yes Stats Done LGPL
SHA cores Yes Stats Done LGPL
twofish 128/192/256 Yes Stats Done GPL

DSP core
Project Files Statistics Status License
Adaptive LMS equalizer Yes Stats Done GPL
DDS Synthesizer Yes Stats Done GPL
Fast Hadamhard Transforms Yes Stats Done
FirGen/MultGen Yes Stats Done GPL
Hilbert Transformer Yes Stats Done GPL

ECC core
Project Files Statistics Status License
Product Code Iterative Decoder Yes Stats Done BSD
* Reed Solomon Decoder (204,188) Yes Stats Done OCCP GPL
Reed Solomon Encoder Yes Stats Done
Reed-Solomon Decoder (31, 19, 6) Yes Stats Done
RS_5_3_GF256 Yes Stats Done
Ultimate CRC Yes Stats Done GPL

Library
Project Files Statistics Status License
extension_pack Yes Stats Done
gh vhdl library Yes Stats Done
Random Number Generator Library Yes Stats Done GPL

Memory core
Project Files Statistics Status License
Functional simulation models... Yes Stats Done LGPL
* High Performance Dynamic... Yes Stats Done OCCP GPL
High Speed SDRAM Controller... Yes Stats Done
Parametrized FIFO based on... Yes Stats Done LGPL
RAM_wb Yes Stats Done Wbc LGPL
srl_fifo Yes Stats Done LGPL
wb_size_bridge Yes Stats Done Wbc
Wishbone FLASH Interface for... Yes Stats Done Wbc LGPL

Processor
Project Files Statistics Status License
1-bit Microprocessor No Stats Done GPL
8080 Compatible CPU Yes Stats Done
ae18 Yes Stats Done Wbc LGPL
aeMB Yes Stats Done Wbc LGPL
Alwcpu - A light weight CPU Yes Stats Done Wbc LGPL
AVRtinyX61core Yes Stats Done LGPL
ClaiRISC - runs 12bit opcode... Yes Stats Done
Cowgirl Yes Stats Done
cpu6502_tc - R6502 Processor... Yes Stats Done GPL
HC11 Compatible - Gator... Yes Stats Done
HPC-16 Yes Stats Done LGPL
LEM1_9 Yes Stats Done LGPL
MCPU - A minimal CPU for a CPLD Yes Stats Done GPL
* openMSP430 Yes Stats Done OCCP LGPL
* OpenRISC 1000 Yes Stats Done Wbc OCCP LGPL
PDP-11/70 CPU core and SoC Yes Stats Done GPL
* Plasma - most MIPS I(TM) opcodes Yes Stats Done OCCP Others
S1 Core Yes Stats Done Wbc GPL
Software Aided Wishbone... Yes Stats Done Wbc BSD
* T400 µController Yes Stats Done OCCP GPL
* T48 µController Yes Stats Done OCCP GPL
T6507LP Yes Stats Done GPL
TG68 - execute 68000 Code Yes Stats Done LGPL
TotalCPU Yes Stats Done
vhdl core of IC6821 Yes Stats Done GPL
Wishbone BFM Yes Stats Done Wbc LGPL
Wishbone High Performance Z80 Yes Stats Done Wbc
ZPU - the worlds smallest 32... Yes Stats Done Wbc

Other
Project Files Statistics Status License
8051 Slave to Wishbone Master... Yes Stats Done Wbc
a VHDL 8254 Timer Yes Stats Done
Adjustable Frequency Divider Yes Stats Done LGPL
Arbitrary Frequency Generator Yes Stats Done LGPL
boundaries Yes Stats Done
Computer Operating Properly Yes Stats Done Wbc BSD
DEFLATE Yes Stats Done Wbc GPL
DPLL with a Random Walk Filter No Stats Done LGPL
DragonBall/68K Wishbone... Yes Stats Done Wbc
Hardware looping unit Yes Stats Done GPL
HASM TestBench Vector Generator Yes Stats Done
I2S Audio Pattern Generator No Stats Done
IMA ADPCM Sound Encoder Yes Stats Done Wbc GPL
LFSR Counter Generator Yes Stats Done LGPL
OpenRisc 1200 Graphic... Yes Stats Done GPL
Picoblaze's Interrupt Controller Yes Stats Done
Programmable Interval Timer Yes Stats Done Wbc BSD
Scalable Arbiter Yes Stats Done BSD
Simple AC'97 controller Yes Stats Done Wbc GPL
Simple All Digital FM Receiver Yes Stats Done GPL
Simple General Purpose IO Yes Stats Done Wbc
SystemC to Verilog... Yes Stats Done
TosNet framework Yes Stats Done LGPL
uTosNet Framework Yes Stats Done LGPL
veristruct Yes Stats Done LGPL

SoC
Project Files Statistics Status License
ahb system generator Yes Stats Done LGPL
AHB to Wishbone Bridge Yes Stats Done Wbc
Assembler with VHDL... Yes Stats Done LGPL
* GECKO3 SoC co-design environment Yes Stats Done Wbc OCCP Others
* minsoc Yes Stats Done Wbc OCCP LGPL
PIF2WB Yes Stats Done Wbc
System-on-Chip Wire (SoCWire) Yes Stats Done
wishbone out port from b3 spec Yes Stats Done Wbc LGPL
Wishbone System6800/01 Yes Stats Done Wbc

System controller
Project Files Statistics Status License
PCI Express x1 16bit VERA... Yes Stats Done
PCI Target Yes Stats Done Wbc LGPL
pci_mini Yes Stats Done Wbc LGPL
TI DSP and Xilinx FPGA Dev Board Yes Stats Done
WB LCD Character Display... Yes Stats Done Wbc LGPL

Video controller
Project Files Statistics Status License
FastMemoryLink VGA... Yes Stats Done GPL
I/Q Constellation diagram on VGA No Stats Done LGPL
Image warping/Texture mapping... No Stats Done Others
JPEG Encoder Yes Stats Done LGPL
JPEG Hardware Compressor Yes Stats Done
Monochrome Text-Mode VGA... Yes Stats Done LGPL
PAL/NTSC encoder Yes Stats Done LGPL
Sharp LQ057Q3DC02 LCD Controller Yes Stats Done GPL
* VGA/LCD Controller Yes Stats Done Wbc OCCP GPL
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