SPI controller core :: Overview

Project maintainers


Name: spi
Created: Jun 12, 2002
Updated: Jun 5, 2015
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Communication controller
Development status: Stable
Additional info: FPGA proven
WishBone Compliant: Yes


SPI (Serial Peripheral Interface) is serial, synchronous, full duplex communication protocol. It is widely used as a board-level interface between different devices such as microcontrollers, DACs, ADCs and others.
This core is SPI/Microwire compliant master serial communication controller with additional functionality.


- Full duplex synchronous serial data transfer
- Variable length of transfer word up to 32 bits
- MSB or LSB first data transfer
- Rx and Tx on both rising or falling edge of serial clock independently
- 8 slave select lines
- Fully static synchronous design with one clock domain
- Technology independent Verilog
- Fully synthesizable


- Tested in FPGA

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