OpenCores

ORPSoC :: Overview

Details

Name: orpsoc
Created: Aug 31, 2011
Updated: Aug 31, 2011
SVN: No files checked in

Other project properties

Category: System on Chip
Language: Verilog
Development status: Planning
Additional info: none
WishBone Compliant: No
License: LGPL

Description

The goal of ORPSoC is to provide a complete System On Chip based on the OpenRISC CPU.
The current version ORPSoCv2 is hosted in the openrisc tree. It can be checked out with
svn co http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2
The documentation for ORPSoC is currently spread out in the OpenRISC project,
but a good starting point is the OpenRISC wiki, especially this page http://opencores.org/or1k/ORPSoC
The bugtracker for the ORPSoC project is found in OpenCores bugzila:
http://bugzilla.opencores.org/buglist.cgi?product=OpenRISC&component=ORPSoC


A new version, orpsocv3 has just started planning.
Some ideas are gathered here http://opencores.org/or1k/ORPSoCv3
More information is yet to come

© copyright 1999-2012 OpenCores.org, equivalent to ORSoC AB, all rights reserved. OpenCores®, registered trademark.