or1200_soc :: Overview
Project maintainers
Details
Name: or1200_soc
Created: Mar 16, 2009
Updated: Feb 27, 2010
SVN Updated: Mar 29, 2011
SVN: Browse
Latest version: download
Statistics: View
Other project properties
Category: System on Chip
Language: Verilog
Development status: Beta
Additional info:
FPGA proven
WishBone Compliant: Yes
License: