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NEWSLETTER FEBRUARY 2011

www.orsoc.se

OpenCores attended the "Electronics For You"-expo in Delhi

ORSoC, representing OpenCores, were invited as Key-Note speaker, to present our view on open-source hardware development...

Read more...


Qfsm - A graphical tool for designing finite state machines

Qfsm is a graphical editor for finite state machines written in C++ using Qt the graphical Toolkit from.....

Read more...


Update from OC-Team

This topic gives you an update of what has been "cooking" at the OpenCores community during the last month.
- Redesigned backend-mail system
- Fixed "password recovery"-function

Read more...


New IP-cores at OpenCores

View a list of all interesting new projects that have reached a first stage of development.

Read more...


Altera catching up with Xilinx

Sales of FPGAs exploded last year. The biggest winner is Altera who is catching up with market leader Xilinx.

Read more...

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Newsletter February 2011


OpenCores attended the "Electronics For You"-expo in Delhi 2011 (17-19 February)

ORSoC, representing OpenCores, were invited to the "Electronics For You"-expo (EFY-expo) as Key-Note speaker, to present our view on open-source hardware development. We did a presentation that covered the OpenCores ecosystem and why we strongly believe that "Open Source hardware IP development is the only efficient method going forward". It was truly a great exhibition with allot of visitors and exhibitors, and there was a strong feeling of innovation talking with engineers and exhibitors and we were impressed by their ideas/knowledge and motivation. We encourage all OpenCores users to visit EFY Expo next year, you will not regret it!

Below are some information about the EFY-expo (www.efyexpo.com):

Electronics For You Expo 2011 is a first-of-its-kind electronics event, from the leading publication serving South Asia’s electronics industry. With the sole aim to accelerate the growth of the electronics industry in India, the expo focuses not only on “components” and “manufacturing equipments” but on the entire eco-system.

In order to build a comprehensive platform for the electronics industry, EFY Expo has everything that an electronics event should provide–starting from innovation (new technology), product design, manufacturing and lastly product sales. The ambit of visitors range from innovators (developers of new technology), design engineers, manufacturers and B2B buyers.

The EFY Group
Over the last 42 years, the EFY group has become synonymous with cutting-edge technology. Today, this renowned media group is spread across 8 locations catering to the intellectual needs of a diverse readership across India and abroad.

Starting with its flagship publication Electronics For You, South Asia’a most popular electronics magazine, the group now offers a bouquet of specialized publications to answer the needs of a technology-hungry nation. The Electronics For You magazine, symbolizing the company’s vision, is the source of enlightenment for an elite electronics fraternity, in India and abroad. Surprisingly, the appeal of the subsequent publications – Linux For You, BenefIT, Facts for You and Electronics Bazaar, spilled much beyond the targeted audience – penetrating non-technical readership with rich content and easy-on-the-eye design.

The group also publishes directories and books and is behind several leading technological events. Recently, it also launched web-portals, including Electronicsforu.com, EFYTimes.com, BPOTimes.com and linuxforu.com, which have become leaders in their respective categories.

The EFY Group has also been producing some elite events, some of which include: EFY Awards, EFY Summit, Open Source India (aka LinuxAsia), and EduTech

Marcus Erlandsson, ORSoC





Qfsm - A graphical tool for designing finite state machines

Finite state machines are commonly used when designing FPGA or ASIC. Normally described in VHDL or Verilog. In most cases a more human readable format is a graphical state diagram. Qfsm is a graphical editor for finite state machines written in C++ using Qt the graphical Toolkit from Trolltech.

Some of the features available in Qfsm

  • Drawing, editing and printing of diagrams
  • Binary, ASCII and "free text" condition codes
  • Integrity check
  • Interactive simulation
  • Creation of VHDL test code
  • Diagram export in the formats: EPS, SVG, and PNG
  • State table export in Latex, HTML and plain text format
  • Other export formats: SCXML, vvvv Automata code
  • Supported platforms include Linux and Windows. There is a RPM package available for SUSE Linux.

Qfsm is available from: http://qfsm.sourceforge.net/

Michael Unnebäck, ORSoC





Update from OC-Team

This topic gives you an update of what has been "cooking" at the OpenCores community during the last month.

This month activities:

Website information:

  • Redesigned backend-mail system
  • Fixed "password recovery"-function

Server information:

  • Replaced a broken harddisk

Our message to the community:

  • Please help us improving the project statistics by answering on the "feedback email" sent automatically to all users after downloading a project (sent two weeks after the download)

Marcus Erlandsson, ORSoC





New IP-cores

Here you will see interesting new projects that have reached the first stage of development.

Griva Basic board
Prototype board.
Development status: Stable
License: LGPL
Updates:
Feb 26, 2011: Sources have been already uploaded to SVN: http://opencores.org/ocsvn/griva/griva/griva_basic_1v2
Feb 26, 2011: Sources have been already uloaded: http://opencores.org/ocsvn/griva/griva/griva_basic_1v2
Feb 24, 2011: Added documents and correct overview
Feb 18, 2011: Start

JTAG Slave / BoundaryScan Slave
JTAG / BoundaryScan is a well known possibility to program flash/prom devices for FPGAs. BoundaryScan is standardized, so you will find a lot of tools to program a external devices in this way. The disadvantage of BoundaryScan is that you have to shift every bit in the boundary scan register to manipulte one io-pin. This means that your maximum io-frequency is JTAG_CLK/BoundaryScan_Len/2. My little spartan 3e here has for example 588 BoundaryScan pins. So the io_frequency at a 6MHz jtag clock is only 5,102kHz. That is slow, if you consider that the prom-file size of this fpga is about 278kByte. But today the fpga vendors offer possiblity to access the jtag-pins inside your FPGA design. For xilinx it is called BSCAN. With this module you can setup your own boundary-scan device, using USER1/USER2 register for sample/extest. In your own boundary scan register you should only add the cells which are important for the programming. In this project example you will find a vhdl description and a bsdl-file for a spansion nor flash. Disdavantage of this method: You have to load your boundary-scan-design in the fpga, before you can access it via your boundary scan tool. But this can easily be done by a (x)svf or a stapl player.
Development status: Beta
License: LGPL
Updates:
Feb 6, 2011: initial setup

CIC-filter core
Implementation of Hogenauer's CIC filter. Core is fully parameterizable, see comments in source code.
Development status: Stable
License: LGPL
Updates:
Feb 22, 2011: Design is tested in Modelsim. FPGA proven too.

PDP-1 reimplementation
PDP-1 reimplementation using an FPGA. The goal is to run old software like Spacewar!, the music compiler, and Expensive Typewriter on current FPGA hardware.
Development status: Alpha
License: LGPL
Updates:
Feb 23, 2011: Filled in initial description, checking in initial code.

Video Stream Scaler
The Video Stream Scaler scales streaming video up or down in resolution. Bilinear and nearest neighbor resize modes are supported.
This core provides run-time adjustment of input and output resolution, scaling factors, and scale type. Compile time adjustment of maximum resolutions and data width.
Development status: Stable
License: LGPL
Updates:
Feb 27, 2011: Updated project status
Feb 25, 2011: Uploaded project to SVN
Feb 25, 2011: Updated overview page


Johan Rilegård, ORSoC




Altera catching up with Xilinx

Sales of FPGAs exploded last year. The biggest winner is Altera who is catching up with market leader Xilinx.

FPGA market has stagnated the last decade with sales of just over three billion dollars. But last year it grew sharply, reaching 4.78 billion dollars compared with 3.38 billion dollars in 2009. The figures come from research firm L-Mar Associates and quoted by the British Electronics Weekly.

Altera’s market share rose to 40.1 percent, up from 35.5 percent in 2009. In cash terms, this means that Alteras sales increased from 1,2 billion dollars in 2009 to 1.9 billion dollars last year.

The worst competitor Xilinx has for long had more than 50 percent of the market but lost big last year. The company went from 53.3 percent in 2009 to 48.1 percent last year. This represents a turnover of 2.3 billion dollars in 2010 and 1,8 billion dollars in 2009.

Altera can also be delighted that the company's market capitalization for long has been higher than for Xilinx. In end of January the difference was 43 percent to Alteras advantage. The company is valued to 11.95 billion dollars while Xilinx's market capitalization is 8.35 billion dollars.

Although Actel, which was acquired by Micro Semi last year, lost market share. The company went from 5.6 percent to 4.8 percent, although sales increased from 190,6 million dollars to $ 230,9million dollars.

Lattice increased slightly from 5.8 percent to 6.1 percent. It sold for 194 million dollars in 2009 and 294 million dollars last year.

Far outside the list are challengers as Achronix, Silicon Blue and Tabula. None of these is likely to threatening the top quartet this year, lead times to bring up the volume is simply too long.

Published by Elektroniktidningen at www.etn.se/53045




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