Newsletter March 2009
You have probably noticed that the OpenCores website has been redesigned and now has a new look. But the biggest improvements have been made behind the scenes - an entirely new setup of hardware and software. Here you can read about what's new and what this means for OpenCores in the future.
During the last couple of months we have completely re-designed the OpenCores website. The primary goal of this is to improve the technology and platform that the site runs on, and the site's look has received a make-over as well. The new platform provides greater flexibility for the maintainers and enables us to add new features with greater ease.
OpenCores is continually growing; more and more companies and engineers are visiting the site, downloading the cores and discussing creating and verifying solutions in the forum. Considering that the user base has grown so much, and continues to do so, we think this website upgrade is timely, and we are very glad to now have a platform which can provide more for the users straight away, as well as being better equipped to handle all the future services we endeavour to provide for the community. The work load to develop the new site has been huge, due to the large number of users together with over 600 projects in the repository.
The first thing you will notice when visiting the new OpenCores is a new design and logo, but soon you realize that the big improvements are within the services supported by OpenCores, they include:
- Revision control system: CVS has been replaced by Subversion (SVN). SVN has many advantages over CVS, and is now considered to be the successor to CVS. All historical information such as revision history and logs have been transferred to the new SVN-database. Please check out the "SVN How To" for more details.
- Forum: We have updated the forum at OpenCores. It will give you a better overview and it will be easier to follow the discussion within different "threads".
We can now present much better statistics from the activities
within the community. This includes real time statistics of the
overall visitors/users experience as well as statistics for all
projects available at OpenCores.
Please notice that the real time statistics are reflecting activities from mid 2008 onwards. The statistics might differ some during the next few weeks. The "old" existing statistics will shortly be added to each project.
All data is exactly the same as in the old website:
We have transferred all data and projects from the old site and they are located at the same places as before. This includes source code, FAQ, information, etc.
Wishlist and future updates.
During the next month we will focus our work within OpenCores to make sure the new site is stable and attempt to address as many bugs as possible. Your help is asked for in reporting any issues you may have while using the site. Your assistance and patience during this initial period is greatly appreciated. We are still in the process of transferring some data from the previous site, such as forum posts and project statistics.
As soon at this is done we will start looking at possible new features for OpenCores. We have a list of some nice features we would like to add, but we would also like to receive input from the users on which they would most like to see. We have placed a wishlist at the site where we will present the most wanted features/IP-cores.
We hope you are pleased with the improvements to the site and ask that the great work is continued by the community in developing the world's biggest site within open source HW development.
View a list of some of the projects that has been updated during the last month. Here you will also see new interesting projects that have reached a first stage of development.
Fixed-point quadratic polynomial
Quadratic_func is a fully pipelined quadratic polynomial that computes the relation y = ax2 + bx + c. [Link to the project page]
Phase: FPGA proven
SMII - Serial MII Ethernet interface
Gives and ordinary Ethernet MAC the possibility to use low pin count serial interface towards Ethernet PHY[Link to the project page]
Minimal UART Core:
This is another UART project, but is different because that it is very small and will occupy less macrocells on a CPLD.
Phase: FPGA proven
GroundHog 2009 is a benchmark suite for reconfigurable architectures in the mobile domain
Phase: FPGA proven
WB LCD Character Display Controller
LCD character display controller with Wishbone and memory mapped interfaces.
Phase: Design done, FPGA proven
EV_JPEG_ENC core is intended to encode raw bitmap images into JPEG compliant coded bit stream
Phase: Design done, Specification done
The Zet SoC PC platform and processor is an open implementation of the so widely used x86 architecture.
Phase: FPGA proven
JPEG Hardware Compressor
This project features a complete JPEG Hardware Compressor
Phase: Design done, FPGA proven, Specification done
The CACHE, cache architecture for configurable hardware engine is a flexible and reconfigurable processor.
Phase Specification done
This is the new OpenCores monthly newsletter. This letter aim to keep everyone up to date with the latest news from OpenCores, including other open source related news within the IP and semiconductor industry.
Each month we will keep the users posted on important updates to IP core projects as well as present new projects and announce any important achievements such as designs reaching the FPGA or ASIC proven stage. We will also keep the community updated on developments to do with the website. We'll present new features as they are implemented and keep you updated on what is in the works.
And of course we will use the newsletter to make sure everyone is aware about important updates, planned maintenance and outages of the website.
We hope everyone will be pleased with the newsletter and appreciate this way of keeping you up to date with what's happening at OpenCores.
All the best,