OpenCores

New AVR-compatible 8-bit RISC available, testers wanted

Source:

As part of the design of an USB OHCI controller for the Milkymist multimedia SoC, a new softcore - dubbed Navré - was developed in order to overcome the performance and resource occupation problems of previous open source 8-bit CPUs.

Compatibility with the Atmel AVR instruction set was chosen because of the excellent support from the GCC toolchain and the wide availability of embedded programs targetted at this architecture. The Navré core can run simple C programs today.

The 2-stage pipelined Navré core occupies less than 1000 Spartan-6 LUTs and runs at about 85MHz in the slowest speed grade of this technology. Most implementations of the instructions are cycle accurate compared to the original AVR from Atmel, which means that most instruction will execute in 1 cycle.

The current major drawback of the core is that little validation work has been carried out on it so far, and several bugs are present. Thus, testers are most welcome.

The idea is to use Verilog simulations to run and verify every instruction just like the simulavr test suite (which can be used for inspiration). Simple and incomplete test benches can be found with the SoftUSB core.

If you are interested in carrying out this work because you need an AVR compatible softcore in your design or just as a contribution to the project, please contact the devel at lists dot milkymist doot org mailing list or drop by the #milkymist channel on the FreeNode IRC network.

By: Sebastien, Bourdeauducq

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