Hi, I'm having a bit of trouble understanding how to load and implement my c code written for an Attiny 261 to work on the vhdl-synthesized attinyx61 core.

I'm using a cyclone 2 fpga included with Altera's DE2 development board.

I'm also fairly new at VHDL in general, my experience has been with verilog

any help is appreciated

after 66 views, no one has any idea?

how about this: has anyone experimented with this particular project in this community?

if so, what was your opinion?

I have no experience with Altera.
If the question is how to transform your hex file into VHDL file the answer is : you have to use a binary program. The only experience I have with ATMEL core can be found here : http://moutou.pagesperso-orange.fr/#English_Projects
But unfortunatly you cannot use the binary executable of this project because it is Xilinx dependent.
Are you really sure the project doesn't have such a C program ?
If not, perhaps try to modify one or send me an email : serge.moutou at univ-reims.fr

Firstly,

Thank you very much for your reply.

Unfortunately, in the time of the original posting to the time you replied, I had given up on the project and I have decided to take another approach. This time, I will write my own AtTiny core in Verilog. Your post has given me some new information in how to interface c code to HDL. I will get back to you shortly once I have written it.

I am currently looking at the NavrE AVR softcore for examples and ways to implement my core.