Help :: Bugtracker :: OpenCores

部分翻译

Help

Information:
Type :: REQUEST
Status :: CLOSED
Assigned to :: Steve, Rhoads

Description:
Hi I have been trying to compile, synthesize, and load the Plasma CPU onto a Spartan 3 board with little success. I keep getting this XST error: WARNING:Xst:2254 - Area constraint could not be met for block , final ratio is 112. Exactly what files should be used to get just the basic CPU running on the FPGA with the ability to talk over the serial cable? Thanks

Comments:

Robinson, John	Jul 6, 2011
Everything works fine, thanks for your help

Robinson, John	Jul 6, 2011
Finally got it to work, thanks, now all I need to do is figure how to make my C programs work without the multiplier unit

Robinson, John	Jul 5, 2011
Finally got it to work, thanks, now all I need to do is figure how to make my C programs work without the multiplier unit

Rhoads, Steve	Jul 1, 2011
I agree with your statements. Place bootldr into ram_image.vhd to be able to download other programs.

Robinson, John	Jun 29, 2011
Thanks for the response. I am using the 3s200ft256 -4 Spartan 3 from Digilent. I'm also assuming plasma_if.vhd should be the top level unit? I am using Active HDL and Xilinx Webpack 10.1. I set plasma_if.vhd as the top level. Do I need to tweak any of the synthesis settings? With the files listed can I load different programs I write after creating the ram_image.vhd and run them on the FPGA seeing the results via the serial interface? I am trying to get the lab3-1 listed on this website to run for a class in embedded systems programming I am teaching this fall: http://www.lirmm.fr/~marchesan/index.php?section=lectures&lec=1 Thanks John

Robinson, John

Jun 29, 2011

Thanks for the response. I am using the 3s200ft256 -4 Spartan 3 from Digilent. I'm also assuming plasma_if.vhd should be the top level unit? I am using Active HDL and Xilinx Webpack 10.1. I set plasma_if.vhd as the top level. Do I need to tweak any of the synthesis settings? With the files listed can I load different programs I write after creating the ram_image.vhd and run them on the FPGA seeing the results via the serial interface? I am trying to get the lab3-1 listed on this website to run for a class in embedded systems programming I am teaching this fall: http://www.lirmm.fr/~marchesan/index.php?section=lectures&lec=1

Thanks

John

Rhoads, Steve	Jun 29, 2011
Which Spartan 3 board are you using? The multiplication block is the largest block. I recommend editing mlite_cpu.vhd and commenting out the call to mult and replace it with: c_mult<=ZERO; pause_mult<='0'; You can then use software based multiplication and division. See kernel/makefile for flags needed when compiling C code. At a minimum you will need the following VHDL files: mlite_pack.vhd, alu.vhd, bus_mux.vhd, control.vhd, mem_ctrl.vhd, mlite_cpu.vhd, pc_next.vhd, plasma.vhd, ram_image.vhd (created from ram_xilinx.vhd), reg_bank.vhd shifter.vhd uart.vhd plasma_if.vhd Steve Rhoads rhoadss@yahoo.com

Rhoads, Steve

Jun 29, 2011

Which Spartan 3 board are you using? The multiplication block is the largest block. I recommend editing mlite_cpu.vhd and commenting out the call to mult and replace it with: c_mult<=ZERO; pause_mult<='0'; You can then use software based multiplication and division. See kernel/makefile for flags needed when compiling C code.

At a minimum you will need the following VHDL files:

mlite_pack.vhd,
alu.vhd,
bus_mux.vhd,
control.vhd,
mem_ctrl.vhd,
mlite_cpu.vhd,
pc_next.vhd,
plasma.vhd,
ram_image.vhd (created from ram_xilinx.vhd),
reg_bank.vhd
shifter.vhd
uart.vhd
plasma_if.vhd

Steve Rhoads
rhoadss@yahoo.com

Browse

Tools

Help